diff options
Diffstat (limited to 'core.c')
| -rw-r--r-- | core.c | 62 |
1 files changed, 31 insertions, 31 deletions
@@ -4,7 +4,7 @@ * This module contains code to probe the FPGA for its installed cores. * * Author: Paul Selkirk, Rob Austein - * Copyright (c) 2015, NORDUnet A/S All rights reserved. + * Copyright (c) 2015-2016, NORDUnet A/S All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are @@ -42,35 +42,8 @@ #include "hal_internal.h" /* - * Each Cryptech core has a set of 4-byte registers, which are accessed - * through a 16-bit address. The address space is divided as follows: - * 3 bits segment selector | up to 8 segments - * 5 bits core selector | up to 32 cores/segment (see note below) - * 8 bits register selector | up to 256 registers/core (see modexp below) - * - * i.e, the address is structured as: - * sss ccccc rrrrrrrr - * - * The I2C and UART communication channels use this 16-bit address format - * directly in their read and write commands. - * - * The EIM communications channel translates this 16-bit address into a - * 32-bit memory-mapped address in the range 0x08000000..807FFFF: - * 00001000000000 sss 0 ccccc rrrrrrrr 00 - * - * EIM, as implemented on the Novena, uses a 19-bit address space: - * Bits 18..16 are the semgent selector. - * Bits 15..10 are the core selector. - * Bits 9..2 are the register selector. - * Bits 1..0 are zero, because reads and writes are always word aligned. - * - * Note that EIM can support 64 cores per segment, but we sacrifice one bit - * in order to map it into a 16-bit address space. - */ - -/* * Structure of our internal database is private, in case we want to - * be change representation (array, tree, list of lists, whatever) at + * change representation (array, tree, list of lists, whatever) at * some later date without having to change the public API. */ @@ -80,6 +53,14 @@ struct hal_core { struct hal_core *next; }; +#ifndef HAL_STATIC_CORE_STATE_BLOCKS +#define HAL_STATIC_CORE_STATE_BLOCKS 0 +#endif + +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 +static hal_core_t core_table[HAL_STATIC_CORE_STATE_BLOCKS]; +#endif + /* * Check whether a core's name matches a particular string. This is a * bit nasty due to non-null-terminated fixed-length names. @@ -119,16 +100,23 @@ static hal_core_t *probe_cores(void) if (head != NULL) return head; - hal_core_t **tail = &head; hal_core_t *core = NULL; + hal_core_t **tail = &head; hal_error_t err = HAL_OK; +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 + int n = 0; +#endif for (hal_addr_t addr = CORE_MIN; addr < CORE_MAX; addr += CORE_SIZE) { +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 + core = &core_table[n]; +#else if (core == NULL && (core = malloc(sizeof(hal_core_t))) == NULL) { err = HAL_ERROR_ALLOCATION_FAILURE; goto fail; } +#endif memset(core, 0, sizeof(*core)); core->info.base = addr; @@ -137,7 +125,7 @@ static hal_core_t *probe_cores(void) (err = hal_io_read(core, ADDR_VERSION, (uint8_t *) core->info.version, 4)) != HAL_OK) goto fail; - if (core->info.name[0] == '\0') + if (core->info.name[0] == 0x00 || core->info.name[0] == 0xff) continue; for (int i = 0; i < sizeof(gaps)/sizeof(*gaps); i++) { @@ -150,20 +138,32 @@ static hal_core_t *probe_cores(void) *tail = core; tail = &core->next; core = NULL; + +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 + if (++n >= HAL_STATIC_CORE_STATE_BLOCKS) + break; +#endif } +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 +#else if (core != NULL) free(core); +#endif return head; fail: +#if HAL_STATIC_CORE_STATE_BLOCKS > 0 + memset(core_table, 0, sizeof(core_table)); +#else if (core != NULL) free(core); while ((core = head) != NULL) { head = core->next; free(core); } +#endif return NULL; } |