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-rw-r--r--core.c4
-rw-r--r--tests/test-bus.c35
-rw-r--r--utils/cores.c37
3 files changed, 22 insertions, 54 deletions
diff --git a/core.c b/core.c
index 8746ec4..44cf3f0 100644
--- a/core.c
+++ b/core.c
@@ -106,9 +106,7 @@ static int name_matches(const hal_core_t *const core, const char * const name)
/* Extra space to leave after particular cores. Yummy. */
static const struct { const char *name; hal_addr_t extra; } gaps[] = {
- { "trng", 4 * CORE_SIZE }, /* Four empty slots after trng */
- { "rosc ent", 3 * CORE_SIZE }, /* Three empty slots after rosc */
- { "csprng", 4 * CORE_SIZE }, /* Four empty slots after csprng */
+ { "csprng", 11 * CORE_SIZE }, /* empty slots after csprng */
{ "modexps6", 3 * CORE_SIZE }, /* ModexpS6 uses four slots */
};
diff --git a/tests/test-bus.c b/tests/test-bus.c
index bffe5d3..be0eadb 100644
--- a/tests/test-bus.c
+++ b/tests/test-bus.c
@@ -48,33 +48,26 @@
* Sanity test - are the cores present, and can we get a random number?
*/
-static int sanity(void)
+static int sanity(const hal_core_t *board_core, const hal_core_t *csprng_core)
{
uint32_t rnd, data;
- int n = 10;
hal_error_t err;
- if (((err = hal_io_expected(BOARD_ADDR_NAME0, (const uint8_t *) NOVENA_BOARD_NAME0, 4)) != HAL_OK) ||
- ((err = hal_io_expected(CSPRNG_ADDR_NAME0, (const uint8_t *) CSPRNG_NAME0, 4)) != HAL_OK)) {
- printf("initialization failed (is the bitstream loaded?): %s\n",
- hal_error_string(err));
+ if (board_core == NULL || csprng_core == NULL) {
+ printf("initialization failed (is the bitstream loaded?)\n");
return 1;
}
- if ((err = hal_io_wait(CSPRNG_ADDR_STATUS, CSPRNG_STATUS_VALID, &n)) != HAL_OK) {
- printf("waiting for CSPRNG: %s\n", hal_error_string(err));
- return 1;
- }
- if ((err = hal_io_read(CSPRNG_ADDR_RANDOM, (uint8_t *) &rnd, sizeof(rnd))) != HAL_OK) {
+ if ((err = hal_get_random(csprng_core, (void *) &rnd, sizeof(rnd))) != HAL_OK) {
printf("reading CSPRNG: %s\n", hal_error_string(err));
return 1;
}
- if ((err = hal_io_write(BOARD_ADDR_DUMMY, (const uint8_t *) &rnd, sizeof(rnd))) != HAL_OK) {
+ if ((err = hal_io_write(board_core, 0xFF, (const uint8_t *) &rnd, sizeof(rnd))) != HAL_OK) {
printf("writing dummy: %s\n", hal_error_string(err));
return 1;
}
- if ((err = hal_io_read(BOARD_ADDR_DUMMY, (uint8_t *) &data, sizeof(data))) != HAL_OK) {
+ if ((err = hal_io_read(board_core, 0xFF, (uint8_t *) &data, sizeof(data))) != HAL_OK) {
printf("reading dummy: %s\n", hal_error_string(err));
return 1;
}
@@ -119,13 +112,13 @@ static void _time_check(char *label, const struct timeval t0, const int err)
* Read and write over and over again.
*/
-static int test_read(void)
+static int test_read(const hal_core_t *board_core)
{
uint32_t i, data;
hal_error_t err;
for (i = 0; i < TEST_NUM_ROUNDS; ++i) {
- if ((err = hal_io_read(BOARD_ADDR_DUMMY, (uint8_t *) &data, sizeof(data))) != HAL_OK) {
+ if ((err = hal_io_read(board_core, 0xFF, (uint8_t *) &data, sizeof(data))) != HAL_OK) {
printf("reading dummy: %s\n", hal_error_string(err));
return 1;
}
@@ -134,13 +127,13 @@ static int test_read(void)
return 0;
}
-static int test_write(void)
+static int test_write(const hal_core_t *board_core)
{
uint32_t i;
hal_error_t err;
for (i = 0; i < TEST_NUM_ROUNDS; ++i) {
- if ((err = hal_io_write(BOARD_ADDR_DUMMY, (const uint8_t *) &i, sizeof(i))) != HAL_OK) {
+ if ((err = hal_io_write(board_core, 0xFF, (const uint8_t *) &i, sizeof(i))) != HAL_OK) {
printf("writing dummy: %s\n", hal_error_string(err));
return 1;
}
@@ -151,13 +144,15 @@ static int test_write(void)
int main(void)
{
+ const hal_core_t *board_core = hal_core_find(NOVENA_BOARD_NAME, NULL);
+ const hal_core_t *csprng_core = hal_core_find(CSPRNG_NAME, NULL);
int err = 0;
- if (sanity() != 0)
+ if (sanity(board_core, csprng_core) != 0)
return 1;
- time_check("read ", test_read());
- time_check("write ", test_write());
+ time_check("read ", test_read(board_core));
+ time_check("write ", test_write(board_core));
return err;
}
diff --git a/utils/cores.c b/utils/cores.c
index da823a7..d59f834 100644
--- a/utils/cores.c
+++ b/utils/cores.c
@@ -40,41 +40,16 @@
#include <sys/time.h>
#include <hal.h>
-
-off_t cores[] = {
- BOARD_ADDR_BASE,
- COMM_ADDR_BASE,
- SHA1_ADDR_BASE,
- SHA256_ADDR_BASE,
- SHA512_ADDR_BASE,
- TRNG_ADDR_BASE,
- ENTROPY1_ADDR_BASE,
- ENTROPY2_ADDR_BASE,
- MIXER_ADDR_BASE,
- CSPRNG_ADDR_BASE,
- AES_ADDR_BASE,
- CHACHA_ADDR_BASE,
- MODEXPS6_ADDR_BASE
-};
+#include <verilog_constants.h>
int main(int argc, char *argv[])
{
- uint8_t name[9] = {0}, version[5] = {0};
- hal_error_t err;
- int i;
-
- /*
- * Initialize EIM and report what cores we've got.
- */
- for (i = 0; i < sizeof(cores)/sizeof(cores[0]); ++i) {
- if ((err = hal_io_read(cores[i], name, 8)) != HAL_OK ||
- (err = hal_io_read(cores[i] + 2, version, 4)) != HAL_OK) {
- printf("hal_io_read failed: %s\n", hal_error_string(err));
- return 1;
- }
+ const hal_core_t *core;
+ const hal_core_info_t *info;
- if (name[0] != 0)
- printf("%08lx: %8s %4s\n", cores[i], name, version);
+ for (core = hal_core_iterate(NULL); core != NULL; core = hal_core_iterate(core)) {
+ info = hal_core_info(core);
+ printf("%08lx: %8.8s %4.4s\n", info->base, info->name, info->version);
}
return 0;