diff options
| author | Paul Selkirk <paul@psgd.org> | 2015-11-16 14:28:57 -0500 |
|---|---|---|
| committer | Paul Selkirk <paul@psgd.org> | 2015-11-16 14:28:57 -0500 |
| commit | 962116cb04e5fe551451c0df0b02085ae96ba4e3 (patch) | |
| tree | 10df39963dba5b5ba34246440249991c507296f8 /verilog_constants.h | |
| parent | 6c6a0f2b54814206873df2ac9611bf37c2a492dc (diff) | |
harmonize ctrl and status addresses with other cores
Diffstat (limited to 'verilog_constants.h')
| -rw-r--r-- | verilog_constants.h | 26 |
1 files changed, 6 insertions, 20 deletions
diff --git a/verilog_constants.h b/verilog_constants.h index 2f04ca5..f30a979 100644 --- a/verilog_constants.h +++ b/verilog_constants.h @@ -1,6 +1,6 @@ /* - * addrs.h - * ------- + * verilog_constants.h + * ------------------- * Magic constants which must match Verilog code, mostly bus addresses. * * In the long run, this should be generated by a script which pulls @@ -84,48 +84,34 @@ /* * RNG cores. - * - * For some reason, the RNG cores use different locations for their - * control and status words. Maybe this will get fixed. Fortunately, - * at the moment, we don't really care, because we never send any - * control bits or read any status bits from any of those cores. */ -#define TRNG_ADDR_CTRL (0x10) #define TRNG_CTRL_DISCARD (1) #define TRNG_CTRL_TEST_MODE (2) -#define TRNG_ADDR_STATUS (0x11) - /* No status bits defined (yet) */ +/* No status bits defined (yet) */ #define TRNG_ADDR_DELAY (0x13) -#define ENTROPY1_ADDR_CTRL (0x10) #define ENTROPY1_CTRL_ENABLE (1) -#define ENTROPY1_ADDR_STATUS (0x11) -#define ENTROPY1_STATUS_VALID (1) +#define ENTROPY1_STATUS_VALID (2) #define ENTROPY1_ADDR_ENTROPY (0x20) #define ENTROPY1_ADDR_DELTA (0x30) -#define ENTROPY2_ADDR_CTRL (0x10) #define ENTROPY2_CTRL_ENABLE (1) -#define ENTROPY2_ADDR_STATUS (0x11) -#define ENTROPY2_STATUS_VALID (1) +#define ENTROPY2_STATUS_VALID (2) #define ENTROPY2_ADDR_OPA (0x18) #define ENTROPY2_ADDR_OPB (0x19) #define ENTROPY2_ADDR_ENTROPY (0x20) #define ENTROPY2_ADDR_RAW (0x21) #define ENTROPY2_ADDR_ROSC (0x22) -#define MIXER_ADDR_CTRL (0x10) #define MIXER_CTRL_ENABLE (1) #define MIXER_CTRL_RESTART (2) -#define MIXER_ADDR_STATUS (0x11) /* No status bits defined (yet) */ #define MIXER_ADDR_TIMEOUT (0x20) - #define CSPRNG_CTRL_ENABLE (1) #define CSPRNG_CTRL_SEED (2) -#define CSPRNG_STATUS_VALID (1) +#define CSPRNG_STATUS_VALID (2) #define CSPRNG_ADDR_RANDOM (0x20) #define CSPRNG_ADDR_NROUNDS (0x40) #define CSPRNG_ADDR_NBLOCKS_LO (0x41) |