Start hacking for systolic modexp.

Work in progress.  Probably won't even compile, much less run.
Requires corresponding new core/math/modexpa7 core.

No support (yet) for ASN.1 encoding of speedup factors or storage of
same in keystore.

No support (yet) for running CRT algorithm in parallel cores.

Minor cleanup of ancient bus I/O code, including EIM and I2C bus code
we'll probably never use again.

1 files changed, 3 insertions, 24 deletions

diff --git a/hal_io_i2c.c b/hal_io_i2c.c
index e7dbbb6..018e264 100644
--- a/hal_io_i2c.c
+++ b/hal_io_i2c.c
@@ -301,24 +301,15 @@ hal_error_t hal_io_read(const hal_core_t *core, hal_addr_t offset, uint8_t *buf,
   return HAL_OK;
 }
 
-hal_error_t hal_io_init(const hal_core_t *core)
-{
-  uint8_t buf[4] = { 0, 0, 0, CTRL_INIT };
-  return hal_io_write(core, ADDR_CTRL, buf, 4);
-}
-
-hal_error_t hal_io_next(const hal_core_t *core)
-{
-  uint8_t buf[4] = { 0, 0, 0, CTRL_NEXT };
-  return hal_io_write(core, ADDR_CTRL, buf, 4);
-}
-
 hal_error_t hal_io_wait(const hal_core_t *core, uint8_t status, int *count)
 {
   hal_error_t err;
   uint8_t buf[4];
   int i;
 
+  if (count && *count == -1)
+    *count = 10;
+
   for (i = 1; ; ++i) {
 
     if (count && (*count > 0) && (i >= *count))
@@ -336,18 +327,6 @@ hal_error_t hal_io_wait(const hal_core_t *core, uint8_t status, int *count)
   }
 }
 
-hal_error_t hal_io_wait_ready(const hal_core_t *core)
-{
-  int limit = 10;
-  return hal_io_wait(core, STATUS_READY, &limit);
-}
-
-hal_error_t hal_io_wait_valid(const hal_core_t *core)
-{
-  int limit = 10;
-  return hal_io_wait(core, STATUS_VALID, &limit);
-}
-
 /*
  * Local variables:
  * indent-tabs-mode: nil