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authorRob Austein <sra@hactrn.net>2015-07-05 19:41:51 -0400
committerRob Austein <sra@hactrn.net>2015-07-05 19:41:51 -0400
commit94666f41262c2d8afb14552d0939ccca31e5e9f3 (patch)
tree85ca89b001594ceb2adeb89f2a22c579b49a35b5
parent48565020c549105baed47ef4fcb7630cccd7ffa1 (diff)
Add load_novena_fpga script.
-rwxr-xr-xutils/load_novena_fpga24
1 files changed, 24 insertions, 0 deletions
diff --git a/utils/load_novena_fpga b/utils/load_novena_fpga
new file mode 100755
index 0000000..512d1c5
--- /dev/null
+++ b/utils/load_novena_fpga
@@ -0,0 +1,24 @@
+#!/bin/sh -
+# Voodoo to load a new bitstream image into the FPGA on a Novena PVT-1.
+
+if test $# -ne 1 || test ! -f "$1"
+then
+ echo 1>&2 "usage: $0 bitstream-file"
+ exit 1
+fi
+
+echo "Setting export of reset pin"
+echo 135 > /sys/class/gpio/export
+
+echo "Setting reset pin to out"
+echo out > /sys/class/gpio/gpio135/direction
+
+echo "Flipping reset"
+echo 0 > /sys/class/gpio/gpio135/value
+echo 1 > /sys/class/gpio/gpio135/value
+
+echo "Configuring FPGA from $1"
+dd if="$1" of=/dev/spidev2.0 bs=128
+
+echo "Turning on clock to FPGA"
+eim_peek_poke --write 0x020c8160 0x00000d2b