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This fixes the last (currently) known problem for the 90MHz
synchronous FMC bus clock.
This time for sure!
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May not work out of the box, but committing this is the easiest way to
let multiple people test the same build configuration.
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Most recent AES core doesn't synthesize properly with core_selector,
and we have other fixes to test. So back AES changes out of the
releng build for now, re-add them when we sort this out.
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Undoubtedly doesn't work yet, and still needs doc, but perhaps now
ready for testing on build machine.
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