| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-01-01 | Accumulated minor changes on fmc_clk branchesfmc_clk | Rob Austein | |
| 2019-01-22 | Catch up with submodules | Rob Austein | |
| 2019-01-14 | .vh search path and aes_speed un-fork. | Rob Austein | |
| 2019-01-08 | Catch up with submodules | Rob Austein | |
| 2018-07-14 | First attempt at integrating Pavel's fmc_clk (synchronous FMC bus) code. | Rob Austein | |
| May not work out of the box, but committing this is the easiest way to let multiple people test the same build configuration. | |||
| 2017-12-15 | Try again with updated cores from Joachim. | Rob Austein | |
| 2017-12-14 | Rewind most recent AES core changes. | Rob Austein | |
| Most recent AES core doesn't synthesize properly with core_selector, and we have other fixes to test. So back AES changes out of the releng build for now, re-add them when we sort this out. | |||
| 2017-12-14 | Joachim's AES core updates. | Rob Austein | |
| 2016-06-27 | First cut at consolidated alpha releng. | Rob Austein | |
| Undoubtedly doesn't work yet, and still needs doc, but perhaps now ready for testing on build machine. | |||
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index : releng/alpha | |
| Release engineering for Cryptech Alpha board | git repositories |
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