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authorFredrik Thulin <fredrik@thulin.net>2015-12-01 08:39:45 +0100
committerFredrik Thulin <fredrik@thulin.net>2015-12-01 08:39:45 +0100
commitf0fbfbc7ed43e005320451220424c839d2da0cba (patch)
treee0af5671065e2444c7c2beb93f87fb64e392bf40 /eagle/lbr
init, import dev-bridge board
Diffstat (limited to 'eagle/lbr')
-rw-r--r--eagle/lbr/Alpha-Power.lbr577
1 files changed, 577 insertions, 0 deletions
diff --git a/eagle/lbr/Alpha-Power.lbr b/eagle/lbr/Alpha-Power.lbr
new file mode 100644
index 0000000..e669e11
--- /dev/null
+++ b/eagle/lbr/Alpha-Power.lbr
@@ -0,0 +1,577 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="7.4.0">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
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+<text x="-2.8514" y="2.786" size="0.8128" layer="25" ratio="10" rot="SR0">&gt;NAME</text>
+<text x="-3.1642" y="-4.1896" size="0.8128" layer="27" ratio="10" rot="SR0">&gt;VALUE</text>
+</package>
+</packages>
+<symbols>
+<symbol name="LMZ22005">
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+<wire x1="22.86" y1="20.32" x2="22.86" y2="-22.86" width="0.254" layer="94"/>
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+<pin name="SYNC" x="-12.7" y="-27.94" visible="pin" length="middle" direction="in" rot="R90"/>
+<pin name="EN" x="-7.62" y="-27.94" visible="pin" length="middle" direction="in" rot="R90"/>
+<pin name="AGND" x="-2.54" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="PGND" x="2.54" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="FB" x="7.62" y="-27.94" visible="pin" length="middle" direction="in" rot="R90"/>
+<pin name="SS/TRK" x="12.7" y="-27.94" visible="pin" length="middle" direction="in" rot="R90"/>
+<pin name="VOUT" x="17.78" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<text x="-15.24" y="22.86" size="1.778" layer="94">&gt;VALUE</text>
+<text x="-15.24" y="10.16" size="1.778" layer="94">&gt;NAME</text>
+</symbol>
+<symbol name="LMZ22008">
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+<pin name="EN" x="-38.1" y="0" visible="pin" length="middle" direction="in"/>
+<pin name="AGND@5" x="2.54" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="PGND" x="-7.62" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="FB" x="17.78" y="-27.94" visible="pin" length="middle" direction="in" rot="R90"/>
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+<pin name="SH" x="-17.78" y="-27.94" visible="pin" length="middle" rot="R90"/>
+<text x="-20.32" y="22.86" size="1.778" layer="94">&gt;VALUE</text>
+<text x="-20.32" y="10.16" size="1.778" layer="94">&gt;NAME</text>
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+<pin name="VIN@1" x="-38.1" y="15.24" visible="pin" length="middle" direction="pwr"/>
+<pin name="AGND@6" x="7.62" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
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+<text x="-4.8514" y="39.624" size="2.0828" layer="95" ratio="10" rot="SR0">&gt;NAME</text>
+<text x="-5.2832" y="45.085" size="2.0828" layer="96" ratio="10" rot="SR0">&gt;VALUE</text>
+<pin name="S_IN" x="-20.32" y="5.08" visible="pin" length="middle" direction="in"/>
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+<pin name="ENABLE" x="-20.32" y="12.7" visible="pin" length="middle" direction="in"/>
+<pin name="AVIN" x="-20.32" y="7.62" visible="pin" length="middle" direction="pwr"/>
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+<pin name="PGND" x="5.08" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
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+<pin name="POK" x="20.32" y="-2.54" visible="pin" length="middle" direction="out" rot="R180"/>
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+<text x="-9.9314" y="26.924" size="2.0828" layer="95" ratio="10" rot="SR0">&gt;NAME</text>
+<text x="-10.3632" y="32.385" size="2.0828" layer="96" ratio="10" rot="SR0">&gt;VALUE</text>
+</symbol>
+</symbols>
+<devicesets>
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+<gates>
+<gate name="G$1" symbol="LMZ22005" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="NDW">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$4"/>
+<connect gate="G$1" pin="EN" pad="P$3"/>
+<connect gate="G$1" pin="FB" pad="P$5"/>
+<connect gate="G$1" pin="PGND" pad="P$8"/>
+<connect gate="G$1" pin="SS/TRK" pad="P$6"/>
+<connect gate="G$1" pin="SYNC" pad="P$2"/>
+<connect gate="G$1" pin="VIN" pad="P$1"/>
+<connect gate="G$1" pin="VOUT" pad="P$7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="OC_FARNELL" value="1890060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="LMZ22008">
+<gates>
+<gate name="G$1" symbol="LMZ22008" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="NDY">
+<connects>
+<connect gate="G$1" pin="AGND@5" pad="P$5"/>
+<connect gate="G$1" pin="AGND@6" pad="P$6"/>
+<connect gate="G$1" pin="EN" pad="P$4"/>
+<connect gate="G$1" pin="FB" pad="P$7"/>
+<connect gate="G$1" pin="PGND" pad="P$8"/>
+<connect gate="G$1" pin="SH" pad="P$10"/>
+<connect gate="G$1" pin="SS/TRK" pad="P$9"/>
+<connect gate="G$1" pin="SYNC" pad="P$3"/>
+<connect gate="G$1" pin="VIN@1" pad="P$1"/>
+<connect gate="G$1" pin="VIN@2" pad="P$2"/>
+<connect gate="G$1" pin="VOUT@10" pad="P$11"/>
+<connect gate="G$1" pin="VOUT@11" pad="P$12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="OC_FARNELL" value="2492265" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="LMZ13608">
+<description>LMZ13608 8-A SIMPLE SWITCHER
+Power Module With 36-V Maximum Input Voltage
+
+http://www.ti.com/lit/ds/symlink/lmz13608.pdf</description>
+<gates>
+<gate name="G$1" symbol="LMZ22008" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="NDY">
+<connects>
+<connect gate="G$1" pin="AGND@5" pad="P$5"/>
+<connect gate="G$1" pin="AGND@6" pad="P$6"/>
+<connect gate="G$1" pin="EN" pad="P$4"/>
+<connect gate="G$1" pin="FB" pad="P$7"/>
+<connect gate="G$1" pin="PGND" pad="P$8"/>
+<connect gate="G$1" pin="SH" pad="P$10"/>
+<connect gate="G$1" pin="SS/TRK" pad="P$9"/>
+<connect gate="G$1" pin="SYNC" pad="P$3"/>
+<connect gate="G$1" pin="VIN@1" pad="P$1"/>
+<connect gate="G$1" pin="VIN@2" pad="P$2"/>
+<connect gate="G$1" pin="VOUT@10" pad="P$11"/>
+<connect gate="G$1" pin="VOUT@11" pad="P$12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="LMZ13608TZ/NOPB" constant="no"/>
+<attribute name="OC_FARNELL" value="2492265" constant="no"/>
+<attribute name="PACKAGE" value="NDY (11)" constant="no"/>
+<attribute name="SUPPLIER" value="Texas Instruments" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="EN5364QI">
+<description>6A PowerSoC
+Voltage Mode Synchronous Buck PWM DC-DC Converter
+With Integrated Inductor</description>
+<gates>
+<gate name="G$1" symbol="EN5364QI" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFN68_8X11X1.85">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$55"/>
+<connect gate="G$1" pin="AVIN" pad="P$53"/>
+<connect gate="G$1" pin="EAOUT" pad="P$57"/>
+<connect gate="G$1" pin="ENABLE" pad="P$52"/>
+<connect gate="G$1" pin="EN_PB" pad="P$51"/>
+<connect gate="G$1" pin="M/S" pad="P$50"/>
+<connect gate="G$1" pin="MAR1" pad="P$61"/>
+<connect gate="G$1" pin="MAR2" pad="P$62"/>
+<connect gate="G$1" pin="OCP_ADJ" pad="P$58"/>
+<connect gate="G$1" pin="PGND" pad="P$1 P$2 P$3 P$4 P$27 P$28 P$29 P$30 P$31 P$32 P$33 P$64 P$65 P$66 P$67 P$68 P$69 P$70 P$71"/>
+<connect gate="G$1" pin="POK" pad="P$54"/>
+<connect gate="G$1" pin="PVIN" pad="P$34 P$35 P$36 P$37 P$38 P$39 P$40 P$41 P$42 P$43"/>
+<connect gate="G$1" pin="SS" pad="P$59"/>
+<connect gate="G$1" pin="S_DELAY" pad="P$60"/>
+<connect gate="G$1" pin="S_IN" pad="P$49"/>
+<connect gate="G$1" pin="S_OUT" pad="P$48"/>
+<connect gate="G$1" pin="VFB" pad="P$56"/>
+<connect gate="G$1" pin="VOUT" pad="P$5 P$6 P$7 P$8 P$9 P$10 P$11 P$12 P$13"/>
+<connect gate="G$1" pin="VSENSE" pad="P$63"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="EN5364QI" constant="no"/>
+<attribute name="OC_FARNELL" value="2081142" constant="no"/>
+<attribute name="PACKAGE" value="QFN" constant="no"/>
+<attribute name="SUPPLIER" value="ENPIRION" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="EN6337QI">
+<description>3A PowerSoC
+Voltage Mode Synchronous PWM Buck with Integrated Inductor</description>
+<gates>
+<gate name="G$1" symbol="EN6337QI" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFN38_4X7X1.85">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$32"/>
+<connect gate="G$1" pin="AVIN" pad="P$33"/>
+<connect gate="G$1" pin="ENABLE" pad="P$27"/>
+<connect gate="G$1" pin="LLM/SYNC" pad="P$26"/>
+<connect gate="G$1" pin="PGND" pad="P$13 P$14 P$15 P$16 P$17 P$18 P$39 P$40"/>
+<connect gate="G$1" pin="POK" pad="P$28"/>
+<connect gate="G$1" pin="PVIN" pad="P$19 P$20 P$21"/>
+<connect gate="G$1" pin="RLLM" pad="P$29"/>
+<connect gate="G$1" pin="SS" pad="P$30"/>
+<connect gate="G$1" pin="VFB" pad="P$31"/>
+<connect gate="G$1" pin="VOUT" pad="P$5 P$6 P$7 P$8 P$9 P$10 P$11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="EN6337QI" constant="no"/>
+<attribute name="PACKAGE" value="QFN" constant="no"/>
+<attribute name="SUPPLIER" value="ENPIRION" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="EN6347QI">
+<description>3A PowerSoC
+Voltage Mode Synchronous PWM Buck with Integrated Inductor</description>
+<gates>
+<gate name="G$1" symbol="EN6337QI" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFN38_4X7X1.85">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$32"/>
+<connect gate="G$1" pin="AVIN" pad="P$33"/>
+<connect gate="G$1" pin="ENABLE" pad="P$27"/>
+<connect gate="G$1" pin="LLM/SYNC" pad="P$26"/>
+<connect gate="G$1" pin="PGND" pad="P$13 P$14 P$15 P$16 P$17 P$18 P$39 P$40"/>
+<connect gate="G$1" pin="POK" pad="P$28"/>
+<connect gate="G$1" pin="PVIN" pad="P$19 P$20 P$21"/>
+<connect gate="G$1" pin="RLLM" pad="P$29"/>
+<connect gate="G$1" pin="SS" pad="P$30"/>
+<connect gate="G$1" pin="VFB" pad="P$31"/>
+<connect gate="G$1" pin="VOUT" pad="P$5 P$6 P$7 P$8 P$9 P$10 P$11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="EN6347QI" constant="no"/>
+<attribute name="OC_FARNELL" value="2081146" constant="no"/>
+<attribute name="PACKAGE" value="QFN" constant="no"/>
+<attribute name="SUPPLIER" value="ENPIRION" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>