From d40e90c3f701987c00e6ea0a642253f0cbb34244 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Wed, 27 May 2015 15:41:00 +0200 Subject: Adding the STMCubeMX configuration file for the STM32F429BIT6 to be used on the Alpha board. --- alpha_board_config.ioc | 513 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 513 insertions(+) create mode 100644 alpha_board_config.ioc diff --git a/alpha_board_config.ioc b/alpha_board_config.ioc new file mode 100644 index 0000000..202e7d2 --- /dev/null +++ b/alpha_board_config.ioc @@ -0,0 +1,513 @@ +#MicroXplorer Configuration settings - do not modify +#Wed May 27 15:14:06 CEST 2015 +FREERTOS.IPParameters=Tasks01 +FREERTOS.Tasks01=defaultTask,0,128,StartDefaultTask +File.Version=5 +KeepUserPlacement=false +Mcu.Family=STM32F4 +Mcu.IP0=FMC +Mcu.IP1=FREERTOS +Mcu.IP10=USART3 +Mcu.IP2=I2C1 +Mcu.IP3=NVIC +Mcu.IP4=RCC +Mcu.IP5=SDIO +Mcu.IP6=SPI1 +Mcu.IP7=SPI2 +Mcu.IP8=USART1 +Mcu.IP9=USART2 +Mcu.IPNb=11 +Mcu.Name=STM32F439B(G-I)Tx +Mcu.Package=LQFP208 +Mcu.Pin0=PE2 +Mcu.Pin1=PE3 +Mcu.Pin10=PF3 +Mcu.Pin11=PF4 +Mcu.Pin12=PF5 +Mcu.Pin13=PC0 +Mcu.Pin14=PC2 +Mcu.Pin15=PC3 +Mcu.Pin16=PA2 +Mcu.Pin17=PH2 +Mcu.Pin18=PH3 +Mcu.Pin19=PA3 +Mcu.Pin2=PE4 +Mcu.Pin20=PA5 +Mcu.Pin21=PA6 +Mcu.Pin22=PA7 +Mcu.Pin23=PF11 +Mcu.Pin24=PF12 +Mcu.Pin25=PF13 +Mcu.Pin26=PF14 +Mcu.Pin27=PF15 +Mcu.Pin28=PG0 +Mcu.Pin29=PG1 +Mcu.Pin3=PE5 +Mcu.Pin30=PE7 +Mcu.Pin31=PE8 +Mcu.Pin32=PE9 +Mcu.Pin33=PE10 +Mcu.Pin34=PE11 +Mcu.Pin35=PE12 +Mcu.Pin36=PE13 +Mcu.Pin37=PE14 +Mcu.Pin38=PE15 +Mcu.Pin39=PB10 +Mcu.Pin4=PE6 +Mcu.Pin40=PB11 +Mcu.Pin41=PH6 +Mcu.Pin42=PH7 +Mcu.Pin43=PH8 +Mcu.Pin44=PH9 +Mcu.Pin45=PH10 +Mcu.Pin46=PH11 +Mcu.Pin47=PH12 +Mcu.Pin48=PB13 +Mcu.Pin49=PD8 +Mcu.Pin5=PI9 +Mcu.Pin50=PD9 +Mcu.Pin51=PD10 +Mcu.Pin52=PD11 +Mcu.Pin53=PD12 +Mcu.Pin54=PD13 +Mcu.Pin55=PD14 +Mcu.Pin56=PD15 +Mcu.Pin57=PG2 +Mcu.Pin58=PG3 +Mcu.Pin59=PG4 +Mcu.Pin6=PI10 +Mcu.Pin60=PG5 +Mcu.Pin61=PG8 +Mcu.Pin62=PC8 +Mcu.Pin63=PC9 +Mcu.Pin64=PA9 +Mcu.Pin65=PA10 +Mcu.Pin66=PH13 +Mcu.Pin67=PH14 +Mcu.Pin68=PH15 +Mcu.Pin69=PI0 +Mcu.Pin7=PF0 +Mcu.Pin70=PI1 +Mcu.Pin71=PI2 +Mcu.Pin72=PI3 +Mcu.Pin73=PC10 +Mcu.Pin74=PC11 +Mcu.Pin75=PC12 +Mcu.Pin76=PD0 +Mcu.Pin77=PD1 +Mcu.Pin78=PD2 +Mcu.Pin79=PD4 +Mcu.Pin8=PF1 +Mcu.Pin80=PD5 +Mcu.Pin81=PD7 +Mcu.Pin82=PG13 +Mcu.Pin83=PG14 +Mcu.Pin84=PG15 +Mcu.Pin85=PB6 +Mcu.Pin86=PB7 +Mcu.Pin87=PE0 +Mcu.Pin88=PE1 +Mcu.Pin89=PI4 +Mcu.Pin9=PF2 +Mcu.Pin90=PI5 +Mcu.Pin91=PI6 +Mcu.Pin92=PI7 +Mcu.Pin93=VP_FREERTOS_VS_ENABLE +Mcu.PinsNb=94 +Mcu.UserName=STM32F439BITx +MxCube.Version=4.7.1 +MxDb.Version=DB.4.0.71 +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SysTick_IRQn=true\:0\:0\:false +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PB10.Mode=Asynchronous +PB10.Signal=USART3_TX +PB11.Mode=Asynchronous +PB11.Signal=USART3_RX +PB13.Mode=Full_Duplex_Master +PB13.Signal=SPI2_SCK +PB6.Mode=I2C +PB6.Signal=I2C1_SCL +PB7.Mode=I2C +PB7.Signal=I2C1_SDA +PC0.Signal=FMC_SDNWE +PC10.Mode=mmc_4_bits_Wide_bus +PC10.Signal=SDIO_D2 +PC11.Mode=mmc_4_bits_Wide_bus +PC11.Signal=SDIO_D3 +PC12.Mode=mmc_4_bits_Wide_bus +PC12.Signal=SDIO_CK +PC2.Mode=Full_Duplex_Master +PC2.Signal=SPI2_MISO +PC3.Mode=Full_Duplex_Master +PC3.Signal=SPI2_MOSI +PC8.Mode=mmc_4_bits_Wide_bus +PC8.Signal=SDIO_D0 +PC9.Mode=mmc_4_bits_Wide_bus +PC9.Signal=SDIO_D1 +PCC.Checker=false +PCC.Family=STM32F4 +PCC.MCU=STM32F439B(G-I)Tx +PCC.MXVersion=4.7.1 +PCC.PartNumber=STM32F439BITx +PCC.Seq0=0 +PCC.SubFamily=STM32F429/439 +PCC.Temperature=25 +PCC.Vdd=null +PD0.Signal=FMC_D2_DA2 +PD1.Signal=FMC_D3_DA3 +PD10.Signal=FMC_D15_DA15 +PD11.Signal=FMC_A16_CLE +PD12.Signal=FMC_A17_ALE +PD13.Signal=FMC_A18 +PD14.Signal=FMC_D0_DA0 +PD15.Signal=FMC_D1_DA1 +PD2.Mode=mmc_4_bits_Wide_bus +PD2.Signal=SDIO_CMD +PD4.Signal=FMC_NOE +PD5.Signal=FMC_NWE +PD7.Mode=NorPsramChipSelect1_1 +PD7.Signal=FMC_NE1 +PD8.Signal=FMC_D13_DA13 +PD9.Signal=FMC_D14_DA14 +PE0.Signal=FMC_NBL0 +PE1.Signal=FMC_NBL1 +PE10.Signal=FMC_D7_DA7 +PE11.Signal=FMC_D8_DA8 +PE12.Signal=FMC_D9_DA9 +PE13.Signal=FMC_D10_DA10 +PE14.Signal=FMC_D11_DA11 +PE15.Signal=FMC_D12_DA12 +PE2.Signal=FMC_A23 +PE3.Signal=FMC_A19 +PE4.Signal=FMC_A20 +PE5.Signal=FMC_A21 +PE6.Signal=FMC_A22 +PE7.Signal=FMC_D4_DA4 +PE8.Signal=FMC_D5_DA5 +PE9.Signal=FMC_D6_DA6 +PF0.Signal=FMC_A0 +PF1.Signal=FMC_A1 +PF11.Signal=FMC_SDNRAS +PF12.Signal=FMC_A6 +PF13.Signal=FMC_A7 +PF14.Signal=FMC_A8 +PF15.Signal=FMC_A9 +PF2.Signal=FMC_A2 +PF3.Signal=FMC_A3 +PF4.Signal=FMC_A4 +PF5.Signal=FMC_A5 +PG0.Signal=FMC_A10 +PG1.Signal=FMC_A11 +PG13.Signal=FMC_A24 +PG14.Signal=FMC_A25 +PG15.Signal=FMC_SDNCAS +PG2.Signal=FMC_A12 +PG3.Signal=FMC_A13 +PG4.Signal=FMC_A14_BA0 +PG5.Signal=FMC_A15_BA1 +PG8.Signal=FMC_SDCLK +PH10.Signal=FMC_D18 +PH11.Signal=FMC_D19 +PH12.Signal=FMC_D20 +PH13.Signal=FMC_D21 +PH14.Signal=FMC_D22 +PH15.Signal=FMC_D23 +PH2.Mode=SdramChipSelect1_1 +PH2.Signal=FMC_SDCKE0 +PH3.Mode=SdramChipSelect1_1 +PH3.Signal=FMC_SDNE0 +PH6.Mode=SdramChipSelect2_2 +PH6.Signal=FMC_SDNE1 +PH7.Mode=SdramChipSelect2_2 +PH7.Signal=FMC_SDCKE1 +PH8.Signal=FMC_D16 +PH9.Signal=FMC_D17 +PI0.Signal=FMC_D24 +PI1.Signal=FMC_D25 +PI10.Signal=FMC_D31 +PI2.Signal=FMC_D26 +PI3.Signal=FMC_D27 +PI4.Signal=FMC_NBL2 +PI5.Signal=FMC_NBL3 +PI6.Signal=FMC_D28 +PI7.Signal=FMC_D29 +PI9.Signal=FMC_D30 +RCC.48MHZClocksFreq_Value=48000000 +RCC.AHBFreq_Value=16000000 +RCC.APB1Freq_Value=16000000 +RCC.APB2Freq_Value=16000000 +RCC.FamilyName=M +RCC.HSE_VALUE=25000000 +RCC.HSI_VALUE=16000000 +RCC.I2SClocksFreq_Value=96000000 +RCC.IPParameters=LSI_VALUE,VcooutputI2SQ,APB2Freq_Value,48MHZClocksFreq_Value,AHBFreq_Value,VCOInputFreq_Value,I2SClocksFreq_Value,VCOSAIOutputFreq_Value,SYSCLKFreq_VALUE,LSE_VALUE,HSE_VALUE,HSI_VALUE,VCOI2SOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,PLLCLKFreq_Value,RTCFreq_Value,FamilyName,VCOOutputFreq_Value,VcooutputI2S,APB1Freq_Value,RTCHSEDivFreq_Value +RCC.LSE_VALUE=32768 +RCC.LSI_VALUE=32000 +RCC.PLLCLKFreq_Value=96000000 +RCC.RTCFreq_Value=32000 +RCC.RTCHSEDivFreq_Value=12500000 +RCC.SYSCLKFreq_VALUE=16000000 +RCC.VCOI2SOutputFreq_Value=192000000 +RCC.VCOInputFreq_Value=1000000 +RCC.VCOOutputFreq_Value=192000000 +RCC.VCOSAIOutputFreq_Value=49000000 +RCC.VCOSAIOutputFreq_ValueQ=12250000 +RCC.VCOSAIOutputFreq_ValueR=24500000 +RCC.VcooutputI2S=96000000 +RCC.VcooutputI2SQ=96000000 +SH.FMC_A0.0=FMC_A0,26b-a1 +SH.FMC_A0.1=FMC_A0,13b-sda1 +SH.FMC_A0.2=FMC_A0,13b-sda2 +SH.FMC_A0.ConfNb=3 +SH.FMC_A1.0=FMC_A1,26b-a1 +SH.FMC_A1.1=FMC_A1,13b-sda1 +SH.FMC_A1.2=FMC_A1,13b-sda2 +SH.FMC_A1.ConfNb=3 +SH.FMC_A10.0=FMC_A10,26b-a1 +SH.FMC_A10.1=FMC_A10,13b-sda1 +SH.FMC_A10.2=FMC_A10,13b-sda2 +SH.FMC_A10.ConfNb=3 +SH.FMC_A11.0=FMC_A11,26b-a1 +SH.FMC_A11.1=FMC_A11,13b-sda1 +SH.FMC_A11.2=FMC_A11,13b-sda2 +SH.FMC_A11.ConfNb=3 +SH.FMC_A12.0=FMC_A12,26b-a1 +SH.FMC_A12.1=FMC_A12,13b-sda1 +SH.FMC_A12.2=FMC_A12,13b-sda2 +SH.FMC_A12.ConfNb=3 +SH.FMC_A13.0=FMC_A13,26b-a1 +SH.FMC_A13.ConfNb=1 +SH.FMC_A14_BA0.0=FMC_A14,26b-a1 +SH.FMC_A14_BA0.1=FMC_BA0,FourSdramBanks2 +SH.FMC_A14_BA0.2=FMC_BA0,FourSdramBanks1 +SH.FMC_A14_BA0.ConfNb=3 +SH.FMC_A15_BA1.0=FMC_A15,26b-a1 +SH.FMC_A15_BA1.1=FMC_BA1,FourSdramBanks2 +SH.FMC_A15_BA1.2=FMC_BA1,FourSdramBanks1 +SH.FMC_A15_BA1.ConfNb=3 +SH.FMC_A16_CLE.0=FMC_A16,26b-a1 +SH.FMC_A16_CLE.ConfNb=1 +SH.FMC_A17_ALE.0=FMC_A17,26b-a1 +SH.FMC_A17_ALE.ConfNb=1 +SH.FMC_A18.0=FMC_A18,26b-a1 +SH.FMC_A18.ConfNb=1 +SH.FMC_A19.0=FMC_A19,26b-a1 +SH.FMC_A19.ConfNb=1 +SH.FMC_A2.0=FMC_A2,26b-a1 +SH.FMC_A2.1=FMC_A2,13b-sda1 +SH.FMC_A2.2=FMC_A2,13b-sda2 +SH.FMC_A2.ConfNb=3 +SH.FMC_A20.0=FMC_A20,26b-a1 +SH.FMC_A20.ConfNb=1 +SH.FMC_A21.0=FMC_A21,26b-a1 +SH.FMC_A21.ConfNb=1 +SH.FMC_A22.0=FMC_A22,26b-a1 +SH.FMC_A22.ConfNb=1 +SH.FMC_A23.0=FMC_A23,26b-a1 +SH.FMC_A23.ConfNb=1 +SH.FMC_A24.0=FMC_A24,26b-a1 +SH.FMC_A24.ConfNb=1 +SH.FMC_A25.0=FMC_A25,26b-a1 +SH.FMC_A25.ConfNb=1 +SH.FMC_A3.0=FMC_A3,26b-a1 +SH.FMC_A3.1=FMC_A3,13b-sda1 +SH.FMC_A3.2=FMC_A3,13b-sda2 +SH.FMC_A3.ConfNb=3 +SH.FMC_A4.0=FMC_A4,26b-a1 +SH.FMC_A4.1=FMC_A4,13b-sda1 +SH.FMC_A4.2=FMC_A4,13b-sda2 +SH.FMC_A4.ConfNb=3 +SH.FMC_A5.0=FMC_A5,26b-a1 +SH.FMC_A5.1=FMC_A5,13b-sda1 +SH.FMC_A5.2=FMC_A5,13b-sda2 +SH.FMC_A5.ConfNb=3 +SH.FMC_A6.0=FMC_A6,26b-a1 +SH.FMC_A6.1=FMC_A6,13b-sda1 +SH.FMC_A6.2=FMC_A6,13b-sda2 +SH.FMC_A6.ConfNb=3 +SH.FMC_A7.0=FMC_A7,26b-a1 +SH.FMC_A7.1=FMC_A7,13b-sda1 +SH.FMC_A7.2=FMC_A7,13b-sda2 +SH.FMC_A7.ConfNb=3 +SH.FMC_A8.0=FMC_A8,26b-a1 +SH.FMC_A8.1=FMC_A8,13b-sda1 +SH.FMC_A8.2=FMC_A8,13b-sda2 +SH.FMC_A8.ConfNb=3 +SH.FMC_A9.0=FMC_A9,26b-a1 +SH.FMC_A9.1=FMC_A9,13b-sda1 +SH.FMC_A9.2=FMC_A9,13b-sda2 +SH.FMC_A9.ConfNb=3 +SH.FMC_D0_DA0.0=FMC_D0,32b-d1 +SH.FMC_D0_DA0.1=FMC_D0,sd-32b-d1 +SH.FMC_D0_DA0.2=FMC_D0,sd-32b-d2 +SH.FMC_D0_DA0.ConfNb=3 +SH.FMC_D10_DA10.0=FMC_D10,32b-d1 +SH.FMC_D10_DA10.1=FMC_D10,sd-32b-d1 +SH.FMC_D10_DA10.2=FMC_D10,sd-32b-d2 +SH.FMC_D10_DA10.ConfNb=3 +SH.FMC_D11_DA11.0=FMC_D11,32b-d1 +SH.FMC_D11_DA11.1=FMC_D11,sd-32b-d1 +SH.FMC_D11_DA11.2=FMC_D11,sd-32b-d2 +SH.FMC_D11_DA11.ConfNb=3 +SH.FMC_D12_DA12.0=FMC_D12,32b-d1 +SH.FMC_D12_DA12.1=FMC_D12,sd-32b-d1 +SH.FMC_D12_DA12.2=FMC_D12,sd-32b-d2 +SH.FMC_D12_DA12.ConfNb=3 +SH.FMC_D13_DA13.0=FMC_D13,32b-d1 +SH.FMC_D13_DA13.1=FMC_D13,sd-32b-d1 +SH.FMC_D13_DA13.2=FMC_D13,sd-32b-d2 +SH.FMC_D13_DA13.ConfNb=3 +SH.FMC_D14_DA14.0=FMC_D14,32b-d1 +SH.FMC_D14_DA14.1=FMC_D14,sd-32b-d1 +SH.FMC_D14_DA14.2=FMC_D14,sd-32b-d2 +SH.FMC_D14_DA14.ConfNb=3 +SH.FMC_D15_DA15.0=FMC_D15,32b-d1 +SH.FMC_D15_DA15.1=FMC_D15,sd-32b-d1 +SH.FMC_D15_DA15.2=FMC_D15,sd-32b-d2 +SH.FMC_D15_DA15.ConfNb=3 +SH.FMC_D16.0=FMC_D16,32b-d1 +SH.FMC_D16.1=FMC_D16,sd-32b-d1 +SH.FMC_D16.2=FMC_D16,sd-32b-d2 +SH.FMC_D16.ConfNb=3 +SH.FMC_D17.0=FMC_D17,32b-d1 +SH.FMC_D17.1=FMC_D17,sd-32b-d1 +SH.FMC_D17.2=FMC_D17,sd-32b-d2 +SH.FMC_D17.ConfNb=3 +SH.FMC_D18.0=FMC_D18,32b-d1 +SH.FMC_D18.1=FMC_D18,sd-32b-d1 +SH.FMC_D18.2=FMC_D18,sd-32b-d2 +SH.FMC_D18.ConfNb=3 +SH.FMC_D19.0=FMC_D19,32b-d1 +SH.FMC_D19.1=FMC_D19,sd-32b-d1 +SH.FMC_D19.2=FMC_D19,sd-32b-d2 +SH.FMC_D19.ConfNb=3 +SH.FMC_D1_DA1.0=FMC_D1,32b-d1 +SH.FMC_D1_DA1.1=FMC_D1,sd-32b-d1 +SH.FMC_D1_DA1.2=FMC_D1,sd-32b-d2 +SH.FMC_D1_DA1.ConfNb=3 +SH.FMC_D20.0=FMC_D20,32b-d1 +SH.FMC_D20.1=FMC_D20,sd-32b-d1 +SH.FMC_D20.2=FMC_D20,sd-32b-d2 +SH.FMC_D20.ConfNb=3 +SH.FMC_D21.0=FMC_D21,32b-d1 +SH.FMC_D21.1=FMC_D21,sd-32b-d1 +SH.FMC_D21.2=FMC_D21,sd-32b-d2 +SH.FMC_D21.ConfNb=3 +SH.FMC_D22.0=FMC_D22,32b-d1 +SH.FMC_D22.1=FMC_D22,sd-32b-d1 +SH.FMC_D22.2=FMC_D22,sd-32b-d2 +SH.FMC_D22.ConfNb=3 +SH.FMC_D23.0=FMC_D23,32b-d1 +SH.FMC_D23.1=FMC_D23,sd-32b-d1 +SH.FMC_D23.2=FMC_D23,sd-32b-d2 +SH.FMC_D23.ConfNb=3 +SH.FMC_D24.0=FMC_D24,32b-d1 +SH.FMC_D24.1=FMC_D24,sd-32b-d1 +SH.FMC_D24.2=FMC_D24,sd-32b-d2 +SH.FMC_D24.ConfNb=3 +SH.FMC_D25.0=FMC_D25,32b-d1 +SH.FMC_D25.1=FMC_D25,sd-32b-d1 +SH.FMC_D25.2=FMC_D25,sd-32b-d2 +SH.FMC_D25.ConfNb=3 +SH.FMC_D26.0=FMC_D26,32b-d1 +SH.FMC_D26.1=FMC_D26,sd-32b-d1 +SH.FMC_D26.2=FMC_D26,sd-32b-d2 +SH.FMC_D26.ConfNb=3 +SH.FMC_D27.0=FMC_D27,32b-d1 +SH.FMC_D27.1=FMC_D27,sd-32b-d1 +SH.FMC_D27.2=FMC_D27,sd-32b-d2 +SH.FMC_D27.ConfNb=3 +SH.FMC_D28.0=FMC_D28,32b-d1 +SH.FMC_D28.1=FMC_D28,sd-32b-d1 +SH.FMC_D28.2=FMC_D28,sd-32b-d2 +SH.FMC_D28.ConfNb=3 +SH.FMC_D29.0=FMC_D29,32b-d1 +SH.FMC_D29.1=FMC_D29,sd-32b-d1 +SH.FMC_D29.2=FMC_D29,sd-32b-d2 +SH.FMC_D29.ConfNb=3 +SH.FMC_D2_DA2.0=FMC_D2,32b-d1 +SH.FMC_D2_DA2.1=FMC_D2,sd-32b-d1 +SH.FMC_D2_DA2.2=FMC_D2,sd-32b-d2 +SH.FMC_D2_DA2.ConfNb=3 +SH.FMC_D30.0=FMC_D30,32b-d1 +SH.FMC_D30.1=FMC_D30,sd-32b-d1 +SH.FMC_D30.2=FMC_D30,sd-32b-d2 +SH.FMC_D30.ConfNb=3 +SH.FMC_D31.0=FMC_D31,32b-d1 +SH.FMC_D31.1=FMC_D31,sd-32b-d1 +SH.FMC_D31.2=FMC_D31,sd-32b-d2 +SH.FMC_D31.ConfNb=3 +SH.FMC_D3_DA3.0=FMC_D3,32b-d1 +SH.FMC_D3_DA3.1=FMC_D3,sd-32b-d1 +SH.FMC_D3_DA3.2=FMC_D3,sd-32b-d2 +SH.FMC_D3_DA3.ConfNb=3 +SH.FMC_D4_DA4.0=FMC_D4,32b-d1 +SH.FMC_D4_DA4.1=FMC_D4,sd-32b-d1 +SH.FMC_D4_DA4.2=FMC_D4,sd-32b-d2 +SH.FMC_D4_DA4.ConfNb=3 +SH.FMC_D5_DA5.0=FMC_D5,32b-d1 +SH.FMC_D5_DA5.1=FMC_D5,sd-32b-d1 +SH.FMC_D5_DA5.2=FMC_D5,sd-32b-d2 +SH.FMC_D5_DA5.ConfNb=3 +SH.FMC_D6_DA6.0=FMC_D6,32b-d1 +SH.FMC_D6_DA6.1=FMC_D6,sd-32b-d1 +SH.FMC_D6_DA6.2=FMC_D6,sd-32b-d2 +SH.FMC_D6_DA6.ConfNb=3 +SH.FMC_D7_DA7.0=FMC_D7,32b-d1 +SH.FMC_D7_DA7.1=FMC_D7,sd-32b-d1 +SH.FMC_D7_DA7.2=FMC_D7,sd-32b-d2 +SH.FMC_D7_DA7.ConfNb=3 +SH.FMC_D8_DA8.0=FMC_D8,32b-d1 +SH.FMC_D8_DA8.1=FMC_D8,sd-32b-d1 +SH.FMC_D8_DA8.2=FMC_D8,sd-32b-d2 +SH.FMC_D8_DA8.ConfNb=3 +SH.FMC_D9_DA9.0=FMC_D9,32b-d1 +SH.FMC_D9_DA9.1=FMC_D9,sd-32b-d1 +SH.FMC_D9_DA9.2=FMC_D9,sd-32b-d2 +SH.FMC_D9_DA9.ConfNb=3 +SH.FMC_NBL0.0=FMC_NBL0,Sd4ByteEnable1 +SH.FMC_NBL0.ConfNb=1 +SH.FMC_NBL1.0=FMC_NBL1,Sd4ByteEnable1 +SH.FMC_NBL1.ConfNb=1 +SH.FMC_NBL2.0=FMC_NBL2,Sd4ByteEnable1 +SH.FMC_NBL2.ConfNb=1 +SH.FMC_NBL3.0=FMC_NBL3,Sd4ByteEnable1 +SH.FMC_NBL3.ConfNb=1 +SH.FMC_NOE.0=FMC_NOE,Sram1 +SH.FMC_NOE.ConfNb=1 +SH.FMC_NWE.0=FMC_NWE,Sram1 +SH.FMC_NWE.ConfNb=1 +SH.FMC_SDCLK.0=FMC_SDCLK,13b-sda1 +SH.FMC_SDCLK.1=FMC_SDCLK,13b-sda2 +SH.FMC_SDCLK.ConfNb=2 +SH.FMC_SDNCAS.0=FMC_SDNCAS,13b-sda1 +SH.FMC_SDNCAS.1=FMC_SDNCAS,13b-sda2 +SH.FMC_SDNCAS.ConfNb=2 +SH.FMC_SDNRAS.0=FMC_SDNRAS,13b-sda1 +SH.FMC_SDNRAS.1=FMC_SDNRAS,13b-sda2 +SH.FMC_SDNRAS.ConfNb=2 +SH.FMC_SDNWE.0=FMC_SDNWE,13b-sda1 +SH.FMC_SDNWE.1=FMC_SDNWE,13b-sda2 +SH.FMC_SDNWE.ConfNb=2 +SPI1.CalculateBaudRate=8.0 MBits/s +SPI1.IPParameters=Mode,CalculateBaudRate +SPI1.Mode=SPI_MODE_MASTER +SPI2.CalculateBaudRate=8.0 MBits/s +SPI2.IPParameters=Mode,CalculateBaudRate +SPI2.Mode=SPI_MODE_MASTER +VP_FREERTOS_VS_ENABLE.Mode=Enabled +VP_FREERTOS_VS_ENABLE.Signal=FREERTOS_VS_ENABLE -- cgit v1.2.3