From 50bc6e775d7a2a4ad75511c43af93759cc6b09c4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Tue, 18 Sep 2018 11:19:30 +0200 Subject: Moved compile time debug access control of key to the API. Added correct code to mux key. --- src/rtl/keywrap.v | 15 +++++++++++---- src/rtl/keywrap_core.v | 3 --- 2 files changed, 11 insertions(+), 7 deletions(-) (limited to 'src/rtl') diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v index 5604ce4..786ab54 100644 --- a/src/rtl/keywrap.v +++ b/src/rtl/keywrap.v @@ -108,6 +108,11 @@ module keywrap #(parameter ADDR_BITS = 13) localparam PAD = ADDR_BITS - 8; + // If set to one, will allow read access to key memory. + // Should be set to zero in all production FPGA bitstreams. + localparam DEBUG_MKM_READ = 1'h1; + + //---------------------------------------------------------------- // Registers including update variables and write enable. //---------------------------------------------------------------- @@ -341,10 +346,12 @@ module keywrap #(parameter ADDR_BITS = 13) if (address == {{PAD{1'h0}}, ADDR_A1}) api_rd_delay_new = core_a_result[31 : 0]; - // Not correct read key mux. - if ((address >= {{PAD{1'h0}}, ADDR_KEY0}) && - (address <= {{PAD{1'h0}}, ADDR_KEY7})) - api_rd_delay_new = core_read_key[031 : 000]; + // Warning: Should be disabled after mkmif + // integration has been completed. + if (DEBUG_MKM_READ) + if ((address >= {{PAD{1'h0}},ADDR_KEY0}) && (address <= {{PAD{1'h0}}, ADDR_KEY7})) + api_rd_delay_new = core_read_key[(7 - (address - {{PAD{1'h0}}, ADDR_KEY7})) * 32 +: 32]; + end // else: !if(we) end // if (cs) end // block: api diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v index e9a7177..6810307 100644 --- a/src/rtl/keywrap_core.v +++ b/src/rtl/keywrap_core.v @@ -90,9 +90,6 @@ module keywrap_core #(parameter MEM_BITS = 11) localparam CTRL_NEXT_UCHECK = 4'h9; localparam CTRL_NEXT_FINALIZE = 4'ha; - // If set to one, will allow read access to key memory. - localparam DEBUG_MKM_READ = 1'h1; - //---------------------------------------------------------------- // Registers and memories including control signals. -- cgit v1.2.3