From 775c435aabb37ef72dbde16c1022a88faf96a5db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Thu, 4 Sep 2014 13:57:47 +0200 Subject: Adding license and README file that gives a brief description of the core. --- README.md | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 README.md (limited to 'README.md') diff --git a/README.md b/README.md new file mode 100644 index 0000000..33d20aa --- /dev/null +++ b/README.md @@ -0,0 +1,20 @@ +vndecorrelator +============== + +A Verilog implementation of a von Neumann decorrelator. + +This tiny module consumes pairs of bits and generates decorrelated +bits. Basically given a sequence of two bits, the decorrelator will: + +0, 1: Emit 1 +1, 0: Emit 0 +0, 0: Emit nothing +1, 1: Emit nothing + +The rate of bits emitted is thus at most half of the bitrate on the +input. + +The module is synchronous, but bits may arrive a number of cycles +between eachother. The module will set the syn_out flag during one cycle +to signal that the value in data_out is a valid bit. + -- cgit v1.2.3