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core/rng/trng
cleanup
master
new_mixer
True Random Number Generator core implemented in Verilog
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tb
Mode
Name
Size
d---------
fake_modules
135
log
plain
-rw-r--r--
tb_csprng.v
10360
log
plain
blame
-rw-r--r--
tb_mixer.v
9117
log
plain
blame
-rw-r--r--
tb_trng.v
7495
log
plain
blame