From a1c1b2afb0b437dc195b5103e3ae46395b0cd2f7 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Wed, 10 Jun 2015 12:39:47 -0400 Subject: make cores contiguous, add mixer name/version --- src/rtl/trng_mixer.v | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/rtl/trng_mixer.v') diff --git a/src/rtl/trng_mixer.v b/src/rtl/trng_mixer.v index 449dc5c..97777ac 100644 --- a/src/rtl/trng_mixer.v +++ b/src/rtl/trng_mixer.v @@ -97,6 +97,10 @@ module trng_mixer( parameter CTRL_ACK = 4'h4; parameter CTRL_NEXT = 4'h5; + localparam ADDR_NAME0 = 8'h00; + localparam ADDR_NAME1 = 8'h01; + localparam ADDR_VERSION = 8'h02; + parameter ADDR_MIXER_CTRL = 8'h10; parameter MIXER_CTRL_ENABLE_BIT = 0; parameter MIXER_CTRL_RESTART_BIT = 1; @@ -105,6 +109,10 @@ module trng_mixer( parameter DEFAULT_ENTROPY_TIMEOUT = 24'h100000; + parameter CORE_NAME0 = 32'h726e676d; // "rngm" + parameter CORE_NAME1 = 32'h69786572; // "ixer" + parameter CORE_VERSION = 32'h302e3530; // "0.50" + //---------------------------------------------------------------- // Registers including update variables and write enable. @@ -523,6 +531,15 @@ module trng_mixer( // Read operations. case (address) // Read operations. + ADDR_NAME0: + tmp_read_data = CORE_NAME0; + + ADDR_NAME1: + tmp_read_data = CORE_NAME1; + + ADDR_VERSION: + tmp_read_data = CORE_VERSION; + ADDR_MIXER_CTRL: begin tmp_read_data = {30'h00000000, restart_reg, enable_reg}; -- cgit v1.2.3