From 821471932eb48bb39a820fc6680355231e6093fa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Sat, 27 Sep 2014 14:38:05 +0200 Subject: Adding debug port for mixer and csprng. In the csprng the debug_update will trigger fifo extraction and thus force random number generation. --- src/rtl/trng_csprng.v | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/rtl/trng_csprng.v') diff --git a/src/rtl/trng_csprng.v b/src/rtl/trng_csprng.v index a6dd247..83c383f 100644 --- a/src/rtl/trng_csprng.v +++ b/src/rtl/trng_csprng.v @@ -178,6 +178,8 @@ module trng_csprng( wire [63 : 0] num_blocks; + wire muxed_rnd_ack; + //---------------------------------------------------------------- // Concurrent connectivity for ports etc. @@ -186,10 +188,11 @@ module trng_csprng( assign error = tmp_error; assign seed_ack = seed_ack_reg; assign more_seed = more_seed_reg; - assign debug = 8'haa; + assign debug = rnd_data[7 : 0]; assign security_error = 0; assign num_blocks = {num_blocks_high_reg, num_blocks_low_reg}; + assign muxed_rnd_ack = rnd_ack | debug_update; //---------------------------------------------------------------- @@ -227,7 +230,7 @@ module trng_csprng( .rnd_syn(rnd_syn), .rnd_data(rnd_data), - .rnd_ack(rnd_ack) + .rnd_ack(muxed_rnd_ack) ); -- cgit v1.2.3