| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-09-16 | Debug fixes found during simulation. Now the trng generates data and provides... | Joachim Strömbergson |
| 2014-09-12 | Adding first version of complete trng. | Joachim Strömbergson |
| 2014-09-11 | Update after completion of rtl and debug of rtl using the updated testbench. ... | Joachim Strömbergson |
| 2014-09-11 | Adding initial versions of rtl and tb for the mixer. | Joachim Strömbergson |
| 2014-09-11 | Adding rtl and tb for the csprng part of the trng. | Joachim Strömbergson |
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index : core/rng/trng | |
| True Random Number Generator core implemented in Verilog | git repositories |
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