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Diffstat (limited to 'src')
-rw-r--r-- | src/rtl/wrappers/README.txt | 1 | ||||
-rw-r--r-- | src/rtl/wrappers/trng_avalanche_entropy.v | 123 |
2 files changed, 0 insertions, 124 deletions
diff --git a/src/rtl/wrappers/README.txt b/src/rtl/wrappers/README.txt deleted file mode 100644 index c77ca7e..0000000 --- a/src/rtl/wrappers/README.txt +++ /dev/null @@ -1 +0,0 @@ -These wrappers are only to be used for synthesis, not simulation. diff --git a/src/rtl/wrappers/trng_avalanche_entropy.v b/src/rtl/wrappers/trng_avalanche_entropy.v deleted file mode 100644 index d49e684..0000000 --- a/src/rtl/wrappers/trng_avalanche_entropy.v +++ /dev/null @@ -1,123 +0,0 @@ - //====================================================================== -// -// trng_avalanche_entropy.v -// ------------------------ -// Wrapper for the avalanche entropy core to adapt it to the trng. -// -// -// Author: Joachim Strombergson -// Copyright (c) 2014, NORDUnet A/S All rights reserved. -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions are -// met: -// - Redistributions of source code must retain the above copyright notice, -// this list of conditions and the following disclaimer. -// -// - Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the distribution. -// -// - Neither the name of the NORDUnet nor the names of its contributors may -// be used to endorse or promote products derived from this software -// without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS -// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED -// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//====================================================================== - -module trng_avalanche_entropy( - // Clock and reset. - input wire clk, - input wire reset_n, - - input wire noise, - - output wire [31 : 0] raw_entropy, - output wire [31 : 0] stats, - - output wire enabled, - output wire entropy_syn, - output wire [31 : 0] entropy_data, - input wire entropy_ack - ); - - - //---------------------------------------------------------------- - // Internal constant and parameter definitions. - //---------------------------------------------------------------- - - - //---------------------------------------------------------------- - // Registers including update variables and write enable. - //---------------------------------------------------------------- - - - - //---------------------------------------------------------------- - // Wires. - //---------------------------------------------------------------- - - - //---------------------------------------------------------------- - // Concurrent connectivity for ports etc. - //---------------------------------------------------------------- - - - //---------------------------------------------------------------- - // core instantiations. - //---------------------------------------------------------------- - avalance_entropy_core core( - .clk(clk), - .reset_n(reset_n), - - .enable(entropy1_enable), - - .noise(avalanche_noise), - - .raw_entropy(entropy1_raw), - .stats(entropy1_stats), - - .enabled(entropy1_enabled), - .entropy_syn(entropy1_syn), - .entropy_data(entropy1_data), - .entropy_ack(entropy1_ack), - .led() - ); - - - //---------------------------------------------------------------- - // reg_update - // - // Update functionality for all registers in the core. - // All registers are positive edge triggered with asynchronous - // active low reset. All registers have write enable. - //---------------------------------------------------------------- - always @ (posedge clk or negedge reset_n) - begin - if (!reset_n) - begin - - end - - else - begin - - end - end // reg_update - -endmodule // trng_avalanche_entropy - -//====================================================================== -// EOF trng_avalanche_entropy.v -//====================================================================== |