From 97a1d6c2af7906e1d2c0e0937aab4fc8e0088082 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= <joachim@secworks.se>
Date: Wed, 24 Sep 2014 10:43:28 +0200
Subject: Fixed synthesis warnings.

---
 src/rtl/rosc_entropy.v | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/rtl/rosc_entropy.v b/src/rtl/rosc_entropy.v
index a5fbd5a..815c606 100644
--- a/src/rtl/rosc_entropy.v
+++ b/src/rtl/rosc_entropy.v
@@ -47,7 +47,7 @@ module rosc_entropy(
                     output wire [31 : 0] read_data,
                     output wire          error,
 
-                    output wire          entropy_enbled,
+                    output wire          entropy_enabled,
                     output wire [31 : 0] entropy_data,
                     output wire          entropy_valid,
                     input wire           entropy_ack,
@@ -75,7 +75,7 @@ module rosc_entropy(
   parameter ADDR_RAW                 = 8'h20;
   parameter ADDR_ROSC_OUTPUTS        = 8'h21;
 
-  parameter DEFAULT_OP_A             = 8'haaaaaaaa;
+  parameter DEFAULT_OP_A             = 32'haaaaaaaa;
   parameter DEFAULT_OP_B             = ~DEFAULT_OP_A;
 
 
@@ -120,7 +120,7 @@ module rosc_entropy(
 
   assign entropy_enabled      = en_reg;
   assign entropy_data         = internal_entropy_data;
-  assign entropy_data_valid   = internal_entropy_valid;
+  assign entropy_valid        = internal_entropy_valid;
   assign internal_entropy_ack = api_entropy_ack | entropy_ack;
 
 
@@ -241,7 +241,7 @@ module rosc_entropy(
 
                 ADDR_STATUS:
                   begin
-                    tmp_read_data[STATUS_ENTROPY_VALID_BIT] = entropy_valid;
+                    tmp_read_data[STATUS_ENTROPY_VALID_BIT] = internal_entropy_valid;
                   end
 
                 ADDR_OP_A:
-- 
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