From 739bc2f3d81081ef6b75a92d66127fa342453395 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Thu, 23 Oct 2014 15:18:42 +0200 Subject: Added Xilinx specific constraint attribute to preserve the ring oscillators. Fixed name of rosc instances. --- src/rtl/rosc_entropy_core.v | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/rtl/rosc_entropy_core.v b/src/rtl/rosc_entropy_core.v index 6fb48ec..eb9dd6e 100644 --- a/src/rtl/rosc_entropy_core.v +++ b/src/rtl/rosc_entropy_core.v @@ -104,6 +104,9 @@ module rosc_entropy_core( // Wires. //---------------------------------------------------------------- reg rosc_we; + + // Ugly in-line Xilinx attribute to preserve the registers. + (* equivalent_register_removal = "no" *) wire [31 : 0] rosc_dout; @@ -127,13 +130,13 @@ module rosc_entropy_core( generate for(i = 0 ; i < 32 ; i = i + 1) begin: oscillators - rosc #(.WIDTH(1)) osc_array(.clk(clk), - .we(rosc_we), - .reset_n(reset_n), - .opa(opa), - .opb(opb), - .dout(rosc_dout[i]) - ); + rosc #(.WIDTH(1)) rosc_array(.clk(clk), + .we(rosc_we), + .reset_n(reset_n), + .opa(opa), + .opb(opb), + .dout(rosc_dout[i]) + ); end endgenerate -- cgit v1.2.3