core/rng/rosc_entropy - Digital entropy source based on on jitter between multiple, digital ring oscillators

Age	Commit message (Collapse)	Author
2015-04-28	Remove the delayed read for EIM (see core/platform/novena commit 2f58e8f).	Paul Selkirk

2015-04-13	Added a simple parameterized zero extension to squash warnings in ISE and ↵	Joachim Strömbergson
	Verilator.
2015-03-26	Adding a README for the rosc entropy source with a short description of what ↵	Joachim Strömbergson
	the core is, how it works and implementation status for different FPGAs.
2015-03-26	Changed fromm hard coded oscillator adder width to localparam and updated ↵	Joachim Strömbergson
	operand sizes used. Changed to localparams for parameters since they don't need to be exposed outside the module. Updated the oscillator array instantiation to reflect what is done.
2015-03-25	register data for eim output	Paul Selkirk

2014-11-14	Added addresses and hard coded strings for name and version accessible from ↵	Joachim Strömbergson
	API. Updated API addresses.
2014-11-07	Added Bernd Paysan as author.	Joachim Strömbergson

2014-10-23	Added Xilinx specific constraint attribute to preserve the ring oscillators. ↵	Joachim Strömbergson
	Fixed name of rosc instances.
2014-10-02	Changed name of register to make it more obvious what it is.	Joachim Strömbergson

2014-09-26	Update of rosc entropy after synthesis of the trng.	Joachim Strömbergson

2014-09-24	Fixed synthesis warnings.	Joachim Strömbergson

2014-09-24	Adding an enable signal port for any consumers to know that the provider is ↵	Joachim Strömbergson
	active.
2014-09-24	Updates to fix bugs found during synthesis. Adding more debug outputs in ↵	Joachim Strömbergson
	API. Adding security error port for future internal health tests.
2014-09-18	Adding a new core for ring oscillator based entropy.	Joachim Strömbergson