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AgeCommit message (Expand)Author
2015-03-17Rearrange cores.Paul Selkirk
2014-05-09Adding new prebuilt FPGA with uart that supports change of bitrate.Joachim Strömbergson
2014-05-07Adding prebuilt coretest_hashes that includes SHA-512.Joachim Strömbergson
2014-05-07Update of prebuilt FPGA configuration with new coretest.Joachim Strömbergson
2014-03-17Adding project, assignment and clock setup files for Quartus and the TerasIC ...Joachim Strömbergson
2014-03-17Adding bitstream file for coretest_hashes on the TerasIC C5G board.Joachim Strömbergson