/* * stm-fmc.c * --------- * Functions to set up and use the FMC bus. * * Copyright (c) 2015, NORDUnet A/S All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * - Neither the name of the NORDUnet nor the names of its contributors may * be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "stm32f4xx_hal.h" #include "stm-init.h" #include "stm-fmc.h" static SRAM_HandleTypeDef _fmc_fpga_inst; static HAL_StatusTypeDef _fmc_init_params(void); HAL_StatusTypeDef fmc_init(void) { static int initialized = 0; if (initialized) { return HAL_OK; } initialized = 1; // configure fmc pins fmc_init_gpio(); // configure fmc registers return _fmc_init_params(); } static int _fmc_nwait_idle(void) { int cnt; // poll NWAIT (number of iterations is limited) for (cnt=0; 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project = novena_eim
vendor = xilinx
family = spartan6
part = xc6slx45csg324-3
top_module = novena_top
isedir = /opt/Xilinx/14.7/ISE_DS
xil_env = . $(isedir)/settings64.sh
ucf = ../ucf/novena_eim.ucf

vfiles = \
	../rtl/novena_eim.v \
	../../common/rtl/novena_regs.v \
	../../common/rtl/novena_clkmgr.v \
	../../common/rtl/ipcore/clkmgr_dcm.v \
	../../../common/core_selector/src/rtl/core_selector.v \
	../../../common/core_selector/src/rtl/global_selector.v \
	../../../common/core_selector/src/rtl/hash_selector.v \
	../../../common/core_selector/src/rtl/rng_selector.v \
	../../../common/core_selector/src/rtl/cipher_selector.v \
	../../../common/core_selector/src/rtl/math_selector.v \
	../../../../comm/eim/src/rtl/cdc_bus_pulse.v \
	../../../../comm/eim/src/rtl/eim_arbiter_cdc.v \
	../../../../comm/eim/src/rtl/eim_arbiter.v \
	../../../../comm/eim/src/rtl/eim_da_phy.v \
	../../../../comm/eim/src/rtl/eim_indicator.v \
	../../../../comm/eim/src/rtl/eim_regs.v \
	../../../../comm/eim/src/rtl/eim.v \
	../../../../hash/sha1/src/rtl/sha1.v \
	../../../../hash/sha1/src/rtl/sha1_core.v \
	../../../../hash/sha1/src/rtl/sha1_w_mem.v \
	../../../../hash/sha256/src/rtl/sha256.v \
	../../../../hash/sha256/src/rtl/sha256_core.v \
	../../../../hash/sha256/src/rtl/sha256_k_constants.v \
	../../../../hash/sha256/src/rtl/sha256_w_mem.v \
	../../../../hash/sha512/src/rtl/sha512.v \
	../../../../hash/sha512/src/rtl/sha512_core.v \
	../../../../hash/sha512/src/rtl/sha512_h_constants.v \
	../../../../hash/sha512/src/rtl/sha512_k_constants.v \
	../../../../hash/sha512/src/rtl/sha512_w_mem.v \
	../../../../rng/avalanche_entropy/src/rtl/avalanche_entropy.v \
	../../../../rng/avalanche_entropy/src/rtl/avalanche_entropy_core.v \
	../../../../rng/rosc_entropy/src/rtl/rosc.v \
	../../../../rng/rosc_entropy/src/rtl/rosc_entropy.v \
	../../../../rng/rosc_entropy/src/rtl/rosc_entropy_core.v \
	../../../../rng/trng/src/rtl/trng.v \
	../../../../rng/trng/src/rtl/trng_csprng.v \
	../../../../rng/trng/src/rtl/trng_csprng_fifo.v \
	../../../../rng/trng/src/rtl/trng_mixer.v \
	../../../../cipher/aes/src/rtl/aes.v \
	../../../../cipher/aes/src/rtl/aes_core.v \
	../../../../cipher/aes/src/rtl/aes_decipher_block.v \
	../../../../cipher/aes/src/rtl/aes_encipher_block.v \
	../../../../cipher/aes/src/rtl/aes_inv_sbox.v \
	../../../../cipher/aes/src/rtl/aes_key_mem.v \
	../../../../cipher/aes/src/rtl/aes_sbox.v \
	../../../../cipher/chacha/src/rtl/chacha.v \
	../../../../cipher/chacha/src/rtl/chacha_core.v \
	../../../../cipher/chacha/src/rtl/chacha_qr.v \
	../../../../math/modexp/src/rtl/adder32.v \
	../../../../math/modexp/src/rtl/blockmem1r1w.v \
	../../../../math/modexp/src/rtl/blockmem2r1w.v \
	../../../../math/modexp/src/rtl/modexp.v \
	../../../../math/modexp/src/rtl/montprod.v \
	../../../../math/modexp/src/rtl/residue.v \
	../../../../math/modexp/src/rtl/shl32.v \
	../../../../math/modexp/src/rtl/shr32.v

include xilinx.mk