#======================================================================
#
# novena_ise.ucf
# --------------
# Constraint file for implementing the Cryptech Novena base
# for the Xilinx Spartan6 LX45 on the Novena.
#
#
# Author: Pavel Shatov
# Copyright (c) 2014, NORDUnet A/S All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
#
# - Neither the name of the NORDUnet nor the names of its contributors may
#   be used to endorse or promote products derived from this software
#   without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#======================================================================

#-------------------------------------------------------------------------------
CONFIG  VCCAUX = 3.3;
#-------------------------------------------------------------------------------


#--------------------------------------------------------------------------------
# GCLK Timing
#--------------------------------------------------------------------------------
NET  "gclk_p_pin" TNM_NET = TNM_gclk;
TIMESPEC  TS_gclk = PERIOD TNM_gclk 20 ns HIGH 50%;


#-------------------------------------------------------------------------------
# FPGA Pinout
#-------------------------------------------------------------------------------
NET  "led_pin"         LOC = "A16" | IOSTANDARD = "LVCMOS33" | SLEW = "SLOW" | DRIVE = 12;
NET  "apoptosis_pin"   LOC = "K1"  | IOSTANDARD = "LVCMOS33" | SLEW = "SLOW" | DRIVE = 12;
NET  "reset_mcu_b_pin" LOC = "F1"  | IOSTANDARD = "LVCMOS33" | PULLUP;

NET  "gclk_p_pin"      LOC = "H2"  | IOSTANDARD = "LVDS_33"  | DIFF_TERM = "TRUE";
NET  "gclk_n_pin"      LOC = "H1"  | IOSTANDARD = "LVDS_33"  | DIFF_TERM = "TRUE";

NET  "i2c_scl"         LOC = "P4"  | IOSTANDARD = LVCMOS33;
NET  "i2c_sda"         LOC = "P3"  | IOSTANDARD = LVCMOS33;

# Pins to the header where the LEDs on the Cryptech
# Avalanche Noise Board are connected.
NET  "ct_led<0>" LOC = K6 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<1>" LOC = H4 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<2>" LOC = H3 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<3>" LOC = M1 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<4>" LOC = L7 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<5>" LOC = G1 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<6>" LOC = T2 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET  "ct_led<7>" LOC = H7 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;

# Pins to the header where the noise sources on the
# Cryptech Avalanche Noise Board are connected.
NET  "ct_noise"  LOC = L4 | IOSTANDARD = LVCMOS33;

#======================================================================
# EOF novena_i2c.ucf
#======================================================================