project = novena_i2c vendor = xilinx family = spartan6 part = xc6slx45csg324-3 top_module = novena_top isedir = /opt/Xilinx/14.7/ISE_DS xil_env = . $(isedir)/settings64.sh ucf = ../ucf/novena_i2c.ucf vfiles = \ ../rtl/novena_i2c.v \ ../../common/rtl/novena_regs.v \ ../../common/rtl/novena_clkmgr.v \ ../../common/rtl/ipcore/clkmgr_dcm.v \ ../../../common/core_selector/src/rtl/core_selector.v \ ../../../common/core_selector/src/rtl/global_selector.v \ ../../../common/core_selector/src/rtl/hash_selector.v \ ../../../common/core_selector/src/rtl/rng_selector.v \ ../../../common/core_selector/src/rtl/cipher_selector.v \ ../../../common/core_selector/src/rtl/math_selector.v \ ../../../../comm/i2c/src/rtl/i2c_regs.v \ ../../../../comm/i2c/src/rtl/i2c_core.v \ ../../../../comm/coretest/src/rtl/coretest.v \ ../../../../hash/sha1/src/rtl/sha1.v \ ../../../../hash/sha1/src/rtl/sha1_core.v \ ../../../../hash/sha1/src/rtl/sha1_w_mem.v \ ../../../../hash/sha256/src/rtl/sha256.v \ ../../../../hash/sha256/src/rtl/sha256_core.v \ ../../../../hash/sha256/src/rtl/sha256_k_constants.v \ ../../../../hash/sha256/src/rtl/sha256_w_mem.v \ ../../../../hash/sha512/src/rtl/sha512.v \ ../../../../hash/sha512/src/rtl/sha512_core.v \ ../../../../hash/sha512/src/rtl/sha512_h_constants.v \ ../../../../hash/sha512/src/rtl/sha512_k_constants.v \ ../../../../hash/sha512/src/rtl/sha512_w_mem.v \ ../../../../rng/avalanche_entropy/src/rtl/avalanche_entropy.v \ ../../../../rng/avalanche_entropy/src/rtl/avalanche_entropy_core.v \ ../../../../rng/rosc_entropy/src/rtl/rosc.v \ ../../../../rng/rosc_entropy/src/rtl/rosc_entropy.v \ ../../../../rng/rosc_entropy/src/rtl/rosc_entropy_core.v \ ../../../../rng/trng/src/rtl/trng.v \ ../../../../rng/trng/src/rtl/trng_csprng.v \ ../../../../rng/trng/src/rtl/trng_csprng_fifo.v \ ../../../../rng/trng/src/rtl/trng_mixer.v \ ../../../../cipher/aes/src/rtl/aes.v \ ../../../../cipher/aes/src/rtl/aes_core.v \ ../../../../cipher/aes/src/rtl/aes_decipher_block.v \ ../../../../cipher/aes/src/rtl/aes_encipher_block.v \ ../../../../cipher/aes/src/rtl/aes_inv_sbox.v \ ../../../../cipher/aes/src/rtl/aes_key_mem.v \ ../../../../cipher/aes/src/rtl/aes_sbox.v \ ../../../../cipher/chacha/src/rtl/chacha.v \ ../../../../cipher/chacha/src/rtl/chacha_core.v \ ../../../../cipher/chacha/src/rtl/chacha_qr.v \ ../../../../math/modexp/src/rtl/adder32.v \ ../../../../math/modexp/src/rtl/blockmem1r1w.v \ ../../../../math/modexp/src/rtl/blockmem2r1wptr.v \ ../../../../math/modexp/src/rtl/blockmem2r1w.v \ ../../../../math/modexp/src/rtl/blockmem2rptr1w.v \ ../../../../math/modexp/src/rtl/modexp.v \ ../../../../math/modexp/src/rtl/modexp_core.v \ ../../../../math/modexp/src/rtl/montprod.v \ ../../../../math/modexp/src/rtl/residue.v \ ../../../../math/modexp/src/rtl/shl32.v \ ../../../../math/modexp/src/rtl/shr32.v include xilinx.mk lint: verilator --lint-only --top-module novena_top -Wall -Wno-fatal -Wno-DECLFILENAME $(vfiles) ../../common/rtl/lint-dummy.v