core_tree	:= $(abspath ../../../..)

word_size	:= $(shell python -c 'from struct import pack; print len(pack("L", 0)) * 8')

project		= novena_eim
vendor		= xilinx
family		= spartan6
part		= xc6slx45csg324-3
top_module	= novena_top
isedir		= /opt/Xilinx/14.7/ISE_DS
xil_env		= . $(isedir)/settings$(word_size).sh
ucf		= ../ucf/novena_eim.ucf

vfiles = \
	$(core_tree)/platform/novena/eim/rtl/novena_eim.v \
	$(core_tree)/platform/novena/common/rtl/novena_regs.v \
	$(core_tree)/platform/novena/common/rtl/novena_clkmgr.v \
	$(core_tree)/platform/novena/common/rtl/ipcore/clkmgr_dcm.v \
	$(core_tree)/platform/novena/config/core_selector.v \
	$(core_tree)/comm/eim/src/rtl/cdc_bus_pulse.v \
	$(core_tree)/comm/eim/src/rtl/eim_arbiter_cdc.v \
	$(core_tree)/comm/eim/src/rtl/eim_arbiter.v \
	$(core_tree)/comm/eim/src/rtl/eim_da_phy.v \
	$(core_tree)/comm/eim/src/rtl/eim_indicator.v \
	$(core_tree)/comm/eim/src/rtl/eim_regs.v \
	$(core_tree)/comm/eim/src/rtl/eim.v

include $(core_tree)/platform/novena/config/core_vfiles.mk

include xilinx.mk

lint:
	verilator --lint-only --top-module novena_top -Wall -Wno-fatal -Wno-DECLFILENAME $(vfiles) ../../common/rtl/lint-dummy.v