From 0f12a4d79d85bc8cf9c32d41e31d229dc7e847d9 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Tue, 17 Jan 2017 23:51:08 -0500 Subject: Track changes to the core_selector generator. --- fmc/build/Makefile | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'fmc') diff --git a/fmc/build/Makefile b/fmc/build/Makefile index c317d02..24d5951 100644 --- a/fmc/build/Makefile +++ b/fmc/build/Makefile @@ -23,25 +23,26 @@ all: $(project).bit # Build the default core_selector if it doesn't already exist. CONFIG = $(CORE_TREE)/platform/common/config +CONFIG_GEN = $(CONFIG)/core_config.py -c $(CONFIG)/core.cfg -b dev-bridge core_selector.v core_vfiles.mk: - $(CONFIG)/config.py -c $(CONFIG)/config.cfg + $(CONFIG_GEN) -p rsa # Build some different configurations bare: - $(CONFIG)/config.py -c $(CONFIG)/config.cfg -s bare + $(CONFIG_GEN) -p bare $(MAKE) project=$(project)_bare ucf=$(ucf) trng: - $(CONFIG)/config.py -c $(CONFIG)/config.cfg -s trng + $(CONFIG_GEN) -p trng $(MAKE) project=$(project)_trng ucf=$(ucf) hash: - $(CONFIG)/config.py -c $(CONFIG)/config.cfg -s hash + $(CONFIG_GEN) -p hash $(MAKE) project=$(project)_hash ucf=$(ucf) rsa: - $(CONFIG)/config.py -c $(CONFIG)/config.cfg -s rsa + $(CONFIG_GEN) -p rsa $(MAKE) project=$(project)_rsa ucf=$(ucf) # Verilog files that always go with builds on this platform. -- cgit v1.2.3