From fb3537929116535169c77fd3c7ccf7fdc8a4c2f7 Mon Sep 17 00:00:00 2001
From: Paul Selkirk <paul@psgd.org>
Date: Tue, 31 Mar 2015 16:34:23 -0400
Subject: Move novena_regs.v to common, fix to match other register read/write
 blocks.

---
 eim/build/Makefile            | 2 +-
 eim/iseconfig/novena_eim.xise | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'eim')

diff --git a/eim/build/Makefile b/eim/build/Makefile
index b677364..e93b05f 100644
--- a/eim/build/Makefile
+++ b/eim/build/Makefile
@@ -9,7 +9,7 @@ ucf = ../ucf/novena_eim.ucf
 
 vfiles = \
 	../rtl/novena_eim.v \
-	../rtl/novena_regs.v \
+	../../common/rtl/novena_regs.v \
 	../../common/rtl/novena_clkmgr.v \
 	../../common/rtl/ipcore/clkmgr_dcm.v \
 	../../../common/core_selector/src/rtl/core_selector.v \
diff --git a/eim/iseconfig/novena_eim.xise b/eim/iseconfig/novena_eim.xise
index b22ae9f..b29633e 100644
--- a/eim/iseconfig/novena_eim.xise
+++ b/eim/iseconfig/novena_eim.xise
@@ -19,7 +19,7 @@
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
       <association xil_pn:name="Implementation" xil_pn:seqID="39"/>
     </file>
-    <file xil_pn:name="../rtl/novena_regs.v" xil_pn:type="FILE_VERILOG">
+    <file xil_pn:name="../../common/rtl/novena_regs.v" xil_pn:type="FILE_VERILOG">
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
       <association xil_pn:name="Implementation" xil_pn:seqID="22"/>
     </file>
-- 
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