From f141a79d805acbab07876d9f007e8809603718b5 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Wed, 10 Jun 2015 12:30:58 -0400 Subject: generate core_selector, probe FPGA for cores at software startup --- config/config.cfg | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 config/config.cfg (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg new file mode 100644 index 0000000..360988e --- /dev/null +++ b/config/config.cfg @@ -0,0 +1,19 @@ +# Config file for the Cryptech Novena FPGA framework. + +[default] +default = rsa + +[hash-only] +cores = sha1, sha256, sha512 + +[trng-only] +cores = trng + +[modexp-only] +cores = modexp + +[rsa] +cores = sha256, aes, trng, modexp + +[multi-test] +cores = sha256, aes, aes, chacha, aes -- cgit v1.2.3 From 0ddd4002f9cf59e72a6f2ec1645c2b4569b3ebc3 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Thu, 24 Sep 2015 23:16:50 -0400 Subject: Git rid of commas in config language, add some comments. --- config/config.cfg | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index 360988e..65659f7 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -4,7 +4,7 @@ default = rsa [hash-only] -cores = sha1, sha256, sha512 +cores = sha1 sha256 sha512 [trng-only] cores = trng @@ -13,7 +13,7 @@ cores = trng cores = modexp [rsa] -cores = sha256, aes, trng, modexp +cores = sha256 aes trng modexp [multi-test] -cores = sha256, aes, aes, chacha, aes +cores = sha256 aes aes chacha aes -- cgit v1.2.3 From fbaa09c3192dcbe21da694b1a35eead58f10e761 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Fri, 25 Sep 2015 14:10:47 -0400 Subject: Configure makefile vfiles list too. --- config/config.cfg | 91 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 1 deletion(-) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index 65659f7..8749b55 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -1,7 +1,19 @@ # Config file for the Cryptech Novena FPGA framework. +# +# At present, there are three kinds of variables in this file. +# +# default-section: Name of the configuration to build if the user +# doesn't specify one. Only meaningful in the default section. +# +# cores: A list of cores to build. Use with the --section option. +# +# vfiles: A list of Verilog files to include in the vfiles list when +# including a particular core. All (optional) cores must have a +# vfiles option, so that the configuration program knows what to put +# into core_vfiles.mk. [default] -default = rsa +default-section = rsa [hash-only] cores = sha1 sha256 sha512 @@ -17,3 +29,80 @@ cores = sha256 aes trng modexp [multi-test] cores = sha256 aes aes chacha aes + +[sha1] +vfiles = + hash/sha1/src/rtl/sha1.v + hash/sha1/src/rtl/sha1_core.v + hash/sha1/src/rtl/sha1_w_mem.v + +[sha256] +vfiles = + hash/sha256/src/rtl/sha256.v + hash/sha256/src/rtl/sha256_core.v + hash/sha256/src/rtl/sha256_k_constants.v + hash/sha256/src/rtl/sha256_w_mem.v + +[sha512] +vfiles = + hash/sha512/src/rtl/sha512.v + hash/sha512/src/rtl/sha512_core.v + hash/sha512/src/rtl/sha512_h_constants.v + hash/sha512/src/rtl/sha512_k_constants.v + hash/sha512/src/rtl/sha512_w_mem.v + +[trng] +vfiles = + rng/avalanche_entropy/src/rtl/avalanche_entropy.v + rng/avalanche_entropy/src/rtl/avalanche_entropy_core.v + rng/rosc_entropy/src/rtl/rosc.v + rng/rosc_entropy/src/rtl/rosc_entropy.v + rng/rosc_entropy/src/rtl/rosc_entropy_core.v + rng/trng/src/rtl/trng.v + rng/trng/src/rtl/trng_csprng.v + rng/trng/src/rtl/trng_csprng_fifo.v + rng/trng/src/rtl/trng_mixer.v + +[aes] +vfiles = + cipher/aes/src/rtl/aes.v + cipher/aes/src/rtl/aes_core.v + cipher/aes/src/rtl/aes_decipher_block.v + cipher/aes/src/rtl/aes_encipher_block.v + cipher/aes/src/rtl/aes_inv_sbox.v + cipher/aes/src/rtl/aes_key_mem.v + cipher/aes/src/rtl/aes_sbox.v + +[chacha] +vfiles = + cipher/chacha/src/rtl/chacha.v + cipher/chacha/src/rtl/chacha_core.v + cipher/chacha/src/rtl/chacha_qr.v + +[modexps6] +vfiles = + math/modexps6/src/rtl/modexps6_adder64_carry32.v + math/modexps6/src/rtl/modexps6_buffer_core.v + math/modexps6/src/rtl/modexps6_buffer_user.v + math/modexps6/src/rtl/modexps6_modinv32.v + math/modexps6/src/rtl/modexps6_montgomery_coeff.v + math/modexps6/src/rtl/modexps6_montgomery_multiplier.v + math/modexps6/src/rtl/modexps6_top.v + math/modexps6/src/rtl/modexps6_wrapper.v + math/modexps6/src/rtl/ram_1rw_1ro_readfirst.v + math/modexps6/src/rtl/ipcore/multiplier_s6.v + math/modexps6/src/rtl/ipcore/subtractor_s6.v + +[modexp] +vfiles = + math/modexp/src/rtl/adder32.v + math/modexp/src/rtl/blockmem1r1w.v + math/modexp/src/rtl/blockmem2r1wptr.v + math/modexp/src/rtl/blockmem2r1w.v + math/modexp/src/rtl/blockmem2rptr1w.v + math/modexp/src/rtl/modexp.v + math/modexp/src/rtl/modexp_core.v + math/modexp/src/rtl/montprod.v + math/modexp/src/rtl/residue.v + math/modexp/src/rtl/shl32.v + math/modexp/src/rtl/shr32.v -- cgit v1.2.3 From 44626ff57b30a5db18766022430199c7eec8cbd6 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Fri, 25 Sep 2015 18:18:30 -0400 Subject: Track filename changes to modexp core that took place ages ago. --- config/config.cfg | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index 8749b55..5f3cf21 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -95,7 +95,7 @@ vfiles = [modexp] vfiles = - math/modexp/src/rtl/adder32.v + math/modexp/src/rtl/adder.v math/modexp/src/rtl/blockmem1r1w.v math/modexp/src/rtl/blockmem2r1wptr.v math/modexp/src/rtl/blockmem2r1w.v @@ -104,5 +104,5 @@ vfiles = math/modexp/src/rtl/modexp_core.v math/modexp/src/rtl/montprod.v math/modexp/src/rtl/residue.v - math/modexp/src/rtl/shl32.v - math/modexp/src/rtl/shr32.v + math/modexp/src/rtl/shl.v + math/modexp/src/rtl/shr.v -- cgit v1.2.3 From 54516bb49c631f447dbd443557fbde3285074c8a Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Sun, 27 Sep 2015 19:20:26 -0400 Subject: Add "requires" option. --- config/config.cfg | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index 5f3cf21..9bb01ae 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -1,6 +1,6 @@ # Config file for the Cryptech Novena FPGA framework. # -# At present, there are three kinds of variables in this file. +# At present, there are four kinds of variables in this file: # # default-section: Name of the configuration to build if the user # doesn't specify one. Only meaningful in the default section. @@ -11,6 +11,11 @@ # including a particular core. All (optional) cores must have a # vfiles option, so that the configuration program knows what to put # into core_vfiles.mk. +# +# requires: A list of other cores whose vfiles must be loaded to build +# this core. This has no effect on the generated core_selector.v +# file, and has no effect at all if an instance of a core named here +# is already included in the build. [default] default-section = rsa @@ -52,6 +57,7 @@ vfiles = hash/sha512/src/rtl/sha512_w_mem.v [trng] +requires = chacha sha512 vfiles = rng/avalanche_entropy/src/rtl/avalanche_entropy.v rng/avalanche_entropy/src/rtl/avalanche_entropy_core.v -- cgit v1.2.3 From 438a6d8e02afdea04e30f8782d4a701e119b3703 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Mon, 28 Sep 2015 19:17:33 -0400 Subject: Handle reset high/low logic in the config file. Connect error signals. --- config/config.cfg | 1 + 1 file changed, 1 insertion(+) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index 9bb01ae..a4120b1 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -86,6 +86,7 @@ vfiles = cipher/chacha/src/rtl/chacha_qr.v [modexps6] +reset_high = true vfiles = math/modexps6/src/rtl/modexps6_adder64_carry32.v math/modexps6/src/rtl/modexps6_buffer_core.v -- cgit v1.2.3 From c71a4b55a2c11349d3de2cd503eb058b384f5d34 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 29 Sep 2015 18:09:04 -0400 Subject: Add support for error_wire and block_memory options. --- config/config.cfg | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'config/config.cfg') diff --git a/config/config.cfg b/config/config.cfg index a4120b1..7e4571c 100644 --- a/config/config.cfg +++ b/config/config.cfg @@ -1,6 +1,6 @@ # Config file for the Cryptech Novena FPGA framework. # -# At present, there are four kinds of variables in this file: +# Variables used in this file: # # default-section: Name of the configuration to build if the user # doesn't specify one. Only meaningful in the default section. @@ -16,6 +16,16 @@ # this core. This has no effect on the generated core_selector.v # file, and has no effect at all if an instance of a core named here # is already included in the build. +# +# reset_high: boolean indicating whether the core uses active reset. +# +# error_wire: boolean indicating whether the core wants a error wire. +# +# block_memory: boolean indicating whether the core uses block memory. +# Effect of this is a bit strange: setting it triggers generation of +# a one-cycle timing delay for every core in this build that does +# *not* use block memory. When no cores in the build use block +# memory, the delay isn't necessary and is therefore omitted. [default] default-section = rsa @@ -86,7 +96,9 @@ vfiles = cipher/chacha/src/rtl/chacha_qr.v [modexps6] -reset_high = true +block_memory = yes +reset_high = yes +error_wire = no vfiles = math/modexps6/src/rtl/modexps6_adder64_carry32.v math/modexps6/src/rtl/modexps6_buffer_core.v @@ -101,6 +113,7 @@ vfiles = math/modexps6/src/rtl/ipcore/subtractor_s6.v [modexp] +error_wire = no vfiles = math/modexp/src/rtl/adder.v math/modexp/src/rtl/blockmem1r1w.v -- cgit v1.2.3