From 283bfbeeb7fb5767815c10ea98bb155638d4bfb3 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Tue, 17 Mar 2015 13:49:30 +0100 Subject: Rearrange cores. --- .../clkmgr_dcm/simulation/functional/simcmds.tcl | 8 ++ .../simulation/functional/simulate_isim.bat | 59 +++++++++++ .../simulation/functional/simulate_isim.sh | 61 +++++++++++ .../simulation/functional/simulate_mti.bat | 61 +++++++++++ .../simulation/functional/simulate_mti.do | 65 ++++++++++++ .../simulation/functional/simulate_mti.sh | 61 +++++++++++ .../simulation/functional/simulate_ncsim.sh | 62 +++++++++++ .../simulation/functional/simulate_vcs.sh | 72 +++++++++++++ .../simulation/functional/ucli_commands.key | 5 + .../simulation/functional/vcs_session.tcl | 18 ++++ .../clkmgr_dcm/simulation/functional/wave.do | 60 +++++++++++ .../clkmgr_dcm/simulation/functional/wave.sv | 118 +++++++++++++++++++++ 12 files changed, 650 insertions(+) create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simcmds.tcl create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.bat create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.sh create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.bat create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.do create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.sh create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_ncsim.sh create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_vcs.sh create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/ucli_commands.key create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/vcs_session.tcl create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.do create mode 100644 common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.sv (limited to 'common/rtl/ipcore/clkmgr_dcm/simulation/functional') diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simcmds.tcl b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simcmds.tcl new file mode 100644 index 0000000..e19ead8 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simcmds.tcl @@ -0,0 +1,8 @@ +# file: simcmds.tcl + +# create the simulation script +vcd dumpfile isim.vcd +vcd dumpvars -m /clkmgr_dcm_tb -l 0 +wave add / +run 50000ns +quit diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.bat b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.bat new file mode 100644 index 0000000..80904cb --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.bat @@ -0,0 +1,59 @@ +REM file: simulate_isim.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +vlogcomp -work work %XILINX%\verilog\src\glbl.v +vlogcomp -work work ..\..\..\clkmgr_dcm.v +vlogcomp -work work ..\..\example_design\clkmgr_dcm_exdes.v +vlogcomp -work work ..\clkmgr_dcm_tb.v + +REM compile the project +fuse work.clkmgr_dcm_tb work.glbl -L unisims_ver -o clkmgr_dcm_isim.exe + +REM run the simulation script +.\clkmgr_dcm_isim.exe -gui -tclbatch simcmds.tcl diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.sh b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.sh new file mode 100644 index 0000000..9fb5029 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.sh @@ -0,0 +1,61 @@ +# file: simulate_isim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# nt +# create the project +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +vlogcomp -work work ../../../clkmgr_dcm.v +vlogcomp -work work ../../example_design/clkmgr_dcm_exdes.v +vlogcomp -work work ../clkmgr_dcm_tb.v + +# compile the project +fuse work.clkmgr_dcm_tb work.glbl -L unisims_ver -o clkmgr_dcm_isim.exe + +# run the simulation script +./clkmgr_dcm_isim.exe -gui -tclbatch simcmds.tcl diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.bat b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.bat new file mode 100644 index 0000000..7497cd9 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.bat @@ -0,0 +1,61 @@ +REM file: simulate_mti.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +REM set up the working directory +vlib work + +REM compile all of the files +vlog -work work %XILINX%\verilog\src\glbl.v +vlog -work work ..\..\..\clkmgr_dcm.v +vlog -work work ..\..\example_design\clkmgr_dcm_exdes.v +vlog -work work ..\clkmgr_dcm_tb.v + +REM run the simulation +vsim -c -t ps -voptargs="+acc" -L secureip -L unisims_ver work.clkmgr_dcm_tb work.glbl + diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.do b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.do new file mode 100644 index 0000000..b0e526f --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.do @@ -0,0 +1,65 @@ +# file: simulate_mti.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $env(XILINX)/verilog/src/glbl.v +vlog -work work ../../../clkmgr_dcm.v +vlog -work work ../../example_design/clkmgr_dcm_exdes.v +vlog -work work ../clkmgr_dcm_tb.v + +# run the simulation +vsim -t ps -voptargs="+acc" -L unisims_ver work.clkmgr_dcm_tb work.glbl +do wave.do +log clkmgr_dcm_tb/dut/counter +log -r /* +run 50000ns diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.sh b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.sh new file mode 100644 index 0000000..66099e0 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.sh @@ -0,0 +1,61 @@ +#/bin/sh +# file: simulate_mti.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $XILINX/verilog/src/glbl.v +vlog -work work ../../../clkmgr_dcm.v +vlog -work work ../../example_design/clkmgr_dcm_exdes.v +vlog -work work ../clkmgr_dcm_tb.v + +# run the simulation +vsim -c -t ps -voptargs="+acc" -L secureip -L unisims_ver work.clkmgr_dcm_tb work.glbl diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_ncsim.sh b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_ncsim.sh new file mode 100644 index 0000000..01b0412 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_ncsim.sh @@ -0,0 +1,62 @@ +#/bin/sh +# file: simulate_ncsim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +mkdir work + +# compile all of the files +ncvlog -work work ${XILINX}/verilog/src/glbl.v +ncvlog -work work ../../../clkmgr_dcm.v +ncvlog -work work ../../example_design/clkmgr_dcm_exdes.v +ncvlog -work work ../clkmgr_dcm_tb.v + +# elaborate and run the simulation +ncelab -work work -access +wc work.clkmgr_dcm_tb work.glbl +ncsim -input "@database -open -shm nc; probe -create -database nc -all -depth all; probe dut.counter; run 50000ns; exit" work.clkmgr_dcm_tb diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_vcs.sh b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_vcs.sh new file mode 100644 index 0000000..39668df --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/simulate_vcs.sh @@ -0,0 +1,72 @@ +#!/bin/sh +# file: simulate_vcs.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# remove old files +rm -rf simv* csrc DVEfiles AN.DB + +# compile all of the files +# Note that -sverilog is not strictly required- You can +# remove the -sverilog if you change the type of the +# localparam for the periods in the testbench file to +# [63:0] from time +vlogan -sverilog \ + ${XILINX}/verilog/src/glbl.v \ + ../../../clkmgr_dcm.v \ + ../../example_design/clkmgr_dcm_exdes.v \ + ../clkmgr_dcm_tb.v + +# prepare the simulation +vcs +vcs+lic+wait -debug clkmgr_dcm_tb glbl + +# run the simulation +./simv -ucli -i ucli_commands.key + +# launch the viewer +dve -vpd vcdplus.vpd -session vcs_session.tcl diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/ucli_commands.key b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/ucli_commands.key new file mode 100644 index 0000000..2bbdd0f --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/ucli_commands.key @@ -0,0 +1,5 @@ +call {$vcdpluson} +call {$vcdplusmemon(clkmgr_dcm_tb.dut.counter)} +run +call {$vcdplusclose} +quit diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/vcs_session.tcl b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/vcs_session.tcl new file mode 100644 index 0000000..628e55a --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/vcs_session.tcl @@ -0,0 +1,18 @@ +gui_open_window Wave +gui_sg_create clkmgr_dcm_group +gui_list_add_group -id Wave.1 {clkmgr_dcm_group} +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.test_phase} +gui_set_radix -radix {ascii} -signals {clkmgr_dcm_tb.test_phase} +gui_sg_addsignal -group clkmgr_dcm_group {{Input_clocks}} -divider +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.CLK_IN1} +gui_sg_addsignal -group clkmgr_dcm_group {{Output_clocks}} -divider +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.dut.clk} +gui_list_expand -id Wave.1 clkmgr_dcm_tb.dut.clk +gui_sg_addsignal -group clkmgr_dcm_group {{Status_control}} -divider +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.RESET} +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.USE_INCLK_STOPPED} +gui_sg_addsignal -group clkmgr_dcm_group {{Counters}} -divider +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.COUNT} +gui_sg_addsignal -group clkmgr_dcm_group {clkmgr_dcm_tb.dut.counter} +gui_list_expand -id Wave.1 clkmgr_dcm_tb.dut.counter +gui_zoom -window Wave.1 -full diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.do b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.do new file mode 100644 index 0000000..eee7422 --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.do @@ -0,0 +1,60 @@ +# file: wave.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +add wave -noupdate -format Literal -radix ascii /clkmgr_dcm_tb/test_phase +add wave -noupdate -divider {Input clocks} +add wave -noupdate -format Logic /clkmgr_dcm_tb/CLK_IN1 +add wave -noupdate -divider {Output clocks} +add wave -noupdate -format Logic /clkmgr_dcm_tb/dut/clk +add wave -noupdate -divider Status/control +add wave -noupdate -format Logic /clkmgr_dcm_tb/RESET +add wave -noupdate -format Logic /clkmgr_dcm_tb/INPUT_CLK_STOPPED +add wave -noupdate -divider Counters +add wave -noupdate -format Literal -radix hexadecimal /clkmgr_dcm_tb/COUNT +add wave -noupdate -format Literal -radix hexadecimal /clkmgr_dcm_tb/dut/counter diff --git a/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.sv b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.sv new file mode 100644 index 0000000..c3c3eef --- /dev/null +++ b/common/rtl/ipcore/clkmgr_dcm/simulation/functional/wave.sv @@ -0,0 +1,118 @@ +# file: wave.sv +# +# (c) Copyright 2008 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# Get the windows set up +# +if {[catch {window new WatchList -name "Design Browser 1" -geometry 1054x819+536+322}] != ""} { + window geometry "Design Browser 1" 1054x819+536+322 +} +window target "Design Browser 1" on +browser using {Design Browser 1} +browser set \ + -scope nc::clkmgr_dcm_tb +browser yview see nc::clkmgr_dcm_tb +browser timecontrol set -lock 0 + +if {[catch {window new WaveWindow -name "Waveform 1" -geometry 1010x600+0+541}] != ""} { + window geometry "Waveform 1" 1010x600+0+541 +} +window target "Waveform 1" on +waveform using {Waveform 1} +waveform sidebar visibility partial +waveform set \ + -primarycursor TimeA \ + -signalnames name \ + -signalwidth 175 \ + -units ns \ + -valuewidth 75 +cursor set -using TimeA -time 0 +waveform baseline set -time 0 +waveform xview limits 0 20000n + +# +# Define signal groups +# +catch {group new -name {Output clocks} -overlay 0} +catch {group new -name {Status/control} -overlay 0} +catch {group new -name {Counters} -overlay 0} + +set id [waveform add -signals [list {nc::clkmgr_dcm_tb.CLK_IN1}]] + +group using {Output clocks} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {clkmgr_dcm_tb.dut.clk} \ + +group using {Counters} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {clkmgr_dcm_tb.dut.counter} \ + +group using {Status/control} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {nc::clkmgr_dcm_tb.RESET} {nc::clkmgr_dcm_tb.INPUT_CLK_STOPPED} + +set id [waveform add -signals [list {nc::clkmgr_dcm_tb.COUNT} ]] + +set id [waveform add -signals [list {nc::clkmgr_dcm_tb.test_phase} ]] +waveform format $id -radix %a + +set groupId [waveform add -groups {{Input clocks}}] +set groupId [waveform add -groups {{Output clocks}}] +set groupId [waveform add -groups {{Status/control}}] +set groupId [waveform add -groups {{Counters}}] -- cgit v1.2.3