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AgeCommit message (Collapse)Author
2015-06-10generate core_selector, probe FPGA for cores at software startupPaul Selkirk
2015-06-10add modexp_core.v to buildPaul Selkirk
2015-05-28add extra effort to map phase of command-line buildPaul Selkirk
2015-05-28add read/write-port version of block memories to buildPaul Selkirk
2015-05-05Add all cores to build files.Paul Selkirk
2015-04-29Cleanup: add error port.Paul Selkirk
2015-04-28Merge branch 'unimap' to 'master'.Paul Selkirk
2015-03-31Move novena_regs.v to common, fix to match other register read/write blocks.Paul Selkirk
2015-03-25integrate trng into core_selector frameworkPaul Selkirk
2015-03-17Rearrange cores.Paul Selkirk