Age | Commit message (Collapse) | Author | |
---|---|---|---|
2015-06-10 | generate core_selector, probe FPGA for cores at software startup | Paul Selkirk | |
2015-06-10 | add modexp_core.v to build | Paul Selkirk | |
2015-05-28 | add extra effort to map phase of command-line build | Paul Selkirk | |
2015-05-28 | add read/write-port version of block memories to build | Paul Selkirk | |
2015-05-05 | Add all cores to build files. | Paul Selkirk | |
2015-04-29 | Cleanup: add error port. | Paul Selkirk | |
2015-04-28 | Merge branch 'unimap' to 'master'. | Paul Selkirk | |
2015-03-31 | Move novena_regs.v to common, fix to match other register read/write blocks. | Paul Selkirk | |
2015-03-25 | integrate trng into core_selector framework | Paul Selkirk | |
2015-03-17 | Rearrange cores. | Paul Selkirk | |