Age | Commit message (Expand) | Author |
---|---|---|
2015-09-28 | Handle reset high/low logic in the config file. Connect error signals. | Rob Austein |
2015-09-27 | Wedge modexps6 into the addressing scheme. Adjust timing of other | Rob Austein |
2015-09-26 | Sorted out reset pins (I think). Seems our various core authors have | Rob Austein |
2015-06-10 | generate core_selector, probe FPGA for cores at software startup | Paul Selkirk |