diff options
Diffstat (limited to 'i2c')
| -rw-r--r-- | i2c/build/xilinx.mk | 16 | ||||
| -rw-r--r-- | i2c/rtl/novena_i2c.v | 14 |
2 files changed, 15 insertions, 15 deletions
diff --git a/i2c/build/xilinx.mk b/i2c/build/xilinx.mk index f35cc98..cace9c1 100644 --- a/i2c/build/xilinx.mk +++ b/i2c/build/xilinx.mk @@ -1,6 +1,6 @@ # The top level module should define the variables below then include # this file. The files listed should be in the same directory as the -# Makefile. +# Makefile. # # variable description # ---------- ------------- @@ -11,7 +11,7 @@ # vfiles all local .v files # xilinx_cores all local .xco files # vendor vendor of FPGA (xilinx, altera, etc.) -# family FPGA device family (spartan3e) +# family FPGA device family (spartan3e) # part FPGA part name (xc4vfx12-10-sf363) # flashsize size of flash for mcs file (16384) # optfile (optional) xst extra opttions file to put in .scr @@ -38,7 +38,7 @@ xil_env ?= . $(isedir)/settings32.sh flashsize ?= 8192 ucf ?= $(project).ucf -libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs)) +libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs)) mkfiles = $(libmks) xilinx.mk include $(libmks) @@ -108,9 +108,9 @@ $(project)_par.ncd: $(project).ncd :; \ else \ $(MAKE) etwr; \ - fi -junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad -junk += $(project)_par_pad.csv $(project)_par_pad.txt + fi +junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad +junk += $(project)_par_pad.csv $(project)_par_pad.txt junk += $(project)_par.grf $(project)_par.ptwx junk += $(project)_par.unroutes $(project)_par.xpi @@ -124,7 +124,7 @@ $(project).ncd: $(project).ngd $(xil_env); \ map $(intstyle) $(map_opts) $$smartguide $< junk += $(project).ncd $(project).pcf $(project).ngm $(project).mrp $(project).map -junk += smartguide.ncd $(project).psr +junk += smartguide.ncd $(project).psr junk += $(project)_summary.xml $(project)_usage.xml $(project).ngd: $(project).ngc $(ucf) @@ -133,7 +133,7 @@ junk += $(project).ngd $(project).bld $(project).ngc: $(vfiles) $(local_corengcs) $(project).scr $(project).prj $(xil_env); xst $(intstyle) -ifn $(project).scr -junk += xlnx_auto* $(top_module).lso $(project).srp +junk += xlnx_auto* $(top_module).lso $(project).srp junk += netlist.lst xst $(project).ngc $(project).prj: $(vfiles) $(mkfiles) diff --git a/i2c/rtl/novena_i2c.v b/i2c/rtl/novena_i2c.v index d1833b2..f6230a0 100644 --- a/i2c/rtl/novena_i2c.v +++ b/i2c/rtl/novena_i2c.v @@ -53,7 +53,7 @@ module novena_top // I2C interface input wire i2c_scl, inout wire i2c_sda, - + // Novena utility ports output wire apoptosis_pin, // Hold low to not restart after config. output wire led_pin // LED on edge close to the FPGA. @@ -94,7 +94,7 @@ module novena_top wire sda_pd; wire sda_int; - + wire clk = sys_clk; wire reset_n = ~sys_rst; @@ -139,7 +139,7 @@ module novena_top .rxd_syn(i2c_rxd_syn), .rxd_data(i2c_rxd_data), .rxd_ack(i2c_rxd_ack), - + // Internal transmit interface. .txd_syn(i2c_txd_syn), .txd_data(i2c_txd_data), @@ -150,15 +150,15 @@ module novena_top ( .clk(clk), .reset_n(reset_n), - + .rx_syn(i2c_rxd_syn), .rx_data(i2c_rxd_data), .rx_ack(i2c_rxd_ack), - + .tx_syn(i2c_txd_syn), .tx_data(i2c_txd_data), .tx_ack(i2c_txd_ack), - + // Interface to the core being tested. .core_reset_n(coretest_reset_n), .core_cs(coretest_cs), @@ -195,7 +195,7 @@ module novena_top .noise(ct_noise), .debug(ct_led) - ); + ); //---------------------------------------------------------------- |