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Diffstat (limited to 'i2c/sw/trng_tester_i2c.c')
-rw-r--r--i2c/sw/trng_tester_i2c.c152
1 files changed, 34 insertions, 118 deletions
diff --git a/i2c/sw/trng_tester_i2c.c b/i2c/sw/trng_tester_i2c.c
index a38f7fa..a5dfb81 100644
--- a/i2c/sw/trng_tester_i2c.c
+++ b/i2c/sw/trng_tester_i2c.c
@@ -1,4 +1,4 @@
-/*
+/*
* trng_tester.c
* --------------
* This program sends several commands to the TRNG subsystem
@@ -9,7 +9,7 @@
*
* Author: Paul Selkirk
* Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
@@ -46,99 +46,14 @@
#include <ctype.h>
#include "tc_i2c.h"
+#include "cryptech_memory_map.h"
-#define WAIT_STATS /* report number of status reads before core says "ready" */
+char *usage = "Usage: %s [-h] [-d] [-q] [-w] [-n #] [-i I2C_device] [-a I2C_addr] tc...\n";
int debug = 0;
int quiet = 0;
int num_words = 10;
-
-/* memory segments for core families */
-#define SEGMENT_OFFSET_GLOBALS 0x0000
-#define SEGMENT_OFFSET_HASHES 0x2000
-#define SEGMENT_OFFSET_RNGS 0x4000
-#define SEGMENT_OFFSET_CIPHERS 0x6000
-
-/* addresses and codes common to all cores */
-#define ADDR_NAME0 0x00
-#define ADDR_NAME1 0x01
-#define ADDR_VERSION 0x02
-
-/* At segment 0, we have board-level register and communication channel registers */
-#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0000
-#define BOARD_ADDR_NAME0 BOARD_ADDR_BASE + ADDR_NAME0
-#define BOARD_ADDR_NAME1 BOARD_ADDR_BASE + ADDR_NAME1
-#define BOARD_ADDR_VERSION BOARD_ADDR_BASE + ADDR_VERSION
-#define BOARD_ADDR_DUMMY BOARD_ADDR_BASE + 0xFF
-
-#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0100
-#define COMM_ADDR_NAME0 COMM_ADDR_BASE + ADDR_NAME0
-#define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1
-#define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION
-
-#define CORE_SIZE 0x100
-
-/* addresses and codes for the TRNG cores */
-#define TRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x00 * CORE_SIZE)
-#define TRNG_ADDR_NAME0 TRNG_ADDR_BASE + ADDR_NAME0
-#define TRNG_ADDR_NAME1 TRNG_ADDR_BASE + ADDR_NAME1
-#define TRNG_ADDR_VERSION TRNG_ADDR_BASE + ADDR_VERSION
-#define TRNG_ADDR_CTRL TRNG_ADDR_BASE + 0x10
-#define TRNG_CTRL_DISCARD 1
-#define TRNG_CTRL_TEST_MODE 2
-#define TRNG_ADDR_STATUS TRNG_ADDR_BASE + 0x11
-/* no status bits defined */
-#define TRNG_ADDR_DELAY TRNG_ADDR_BASE + 0x13
-
-#define ENTROPY1_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x05 * CORE_SIZE)
-#define ENTROPY1_ADDR_NAME0 ENTROPY1_ADDR_BASE + ADDR_NAME0
-#define ENTROPY1_ADDR_NAME1 ENTROPY1_ADDR_BASE + ADDR_NAME1
-#define ENTROPY1_ADDR_VERSION ENTROPY1_ADDR_BASE + ADDR_VERSION
-#define ENTROPY1_ADDR_CTRL ENTROPY1_ADDR_BASE + 0x10
-#define ENTROPY1_CTRL_ENABLE 1
-#define ENTROPY1_ADDR_STATUS ENTROPY1_ADDR_BASE + 0x11
-#define ENTROPY1_STATUS_VALID 1
-#define ENTROPY1_ADDR_ENTROPY ENTROPY1_ADDR_BASE + 0x20
-#define ENTROPY1_ADDR_DELTA ENTROPY1_ADDR_BASE + 0x30
-
-#define ENTROPY2_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x06 * CORE_SIZE)
-#define ENTROPY2_ADDR_NAME0 ENTROPY2_ADDR_BASE + ADDR_NAME0
-#define ENTROPY2_ADDR_NAME1 ENTROPY2_ADDR_BASE + ADDR_NAME1
-#define ENTROPY2_ADDR_VERSION ENTROPY2_ADDR_BASE + ADDR_VERSION
-#define ENTROPY2_ADDR_CTRL ENTROPY2_ADDR_BASE + 0x10
-#define ENTROPY2_CTRL_ENABLE 1
-#define ENTROPY2_ADDR_STATUS ENTROPY2_ADDR_BASE + 0x11
-#define ENTROPY2_STATUS_VALID 1
-#define ENTROPY2_ADDR_OPA ENTROPY2_ADDR_BASE + 0x18
-#define ENTROPY2_ADDR_OPB ENTROPY2_ADDR_BASE + 0x19
-#define ENTROPY2_ADDR_ENTROPY ENTROPY2_ADDR_BASE + 0x20
-#define ENTROPY2_ADDR_RAW ENTROPY2_ADDR_BASE + 0x21
-#define ENTROPY2_ADDR_ROSC ENTROPY2_ADDR_BASE + 0x22
-
-#define MIXER_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0a * CORE_SIZE)
-#define MIXER_ADDR_NAME0 MIXER_ADDR_BASE + ADDR_NAME0
-#define MIXER_ADDR_NAME1 MIXER_ADDR_BASE + ADDR_NAME1
-#define MIXER_ADDR_VERSION MIXER_ADDR_BASE + ADDR_VERSION
-#define MIXER_ADDR_CTRL MIXER_ADDR_BASE + 0x10
-#define MIXER_CTRL_ENABLE 1
-#define MIXER_CTRL_RESTART 2
-#define MIXER_ADDR_STATUS MIXER_ADDR_BASE + 0x11
-/* no status bits defined */
-#define MIXER_ADDR_TIMEOUT MIXER_ADDR_BASE + 0x20
-
-#define CSPRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0b * CORE_SIZE)
-#define CSPRNG_ADDR_NAME0 CSPRNG_ADDR_BASE + ADDR_NAME0
-#define CSPRNG_ADDR_NAME1 CSPRNG_ADDR_BASE + ADDR_NAME1
-#define CSPRNG_ADDR_VERSION CSPRNG_ADDR_BASE + ADDR_VERSION
-#define CSPRNG_ADDR_CTRL CSPRNG_ADDR_BASE + 0x10
-#define CSPRNG_CTRL_ENABLE 1
-#define CSPRNG_CTRL_SEED 2
-#define CSPRNG_ADDR_STATUS CSPRNG_ADDR_BASE + 0x11
-#define CSPRNG_STATUS_VALID 1
-#define CSPRNG_ADDR_RANDOM CSPRNG_ADDR_BASE + 0x20
-#define CSPRNG_ADDR_NROUNDS CSPRNG_ADDR_BASE + 0x40
-#define CSPRNG_ADDR_NBLOCKS_LO CSPRNG_ADDR_BASE + 0x41
-#define CSPRNG_ADDR_NBLOCKS_HI CSPRNG_ADDR_BASE + 0x42
+int wait_stats = 0;
/* ---------------- sanity test case ---------------- */
@@ -162,7 +77,7 @@ int TC0()
*/
(void)time((time_t *)t);
if (tc_write(BOARD_ADDR_DUMMY, t, 4) != 0)
- return 1;
+ return 1;
if (tc_expected(BOARD_ADDR_NAME0, board_name0, 4) ||
tc_expected(BOARD_ADDR_NAME1, board_name1, 4) ||
@@ -224,26 +139,26 @@ int TC2(void)
int TC3(void)
{
int i, n;
- unsigned long entropy;
+ uint32_t entropy;
if (!quiet)
printf("TC3: Read random data from avalanche_entropy.\n");
for (i = 0; i < num_words; ++i) {
/* check status */
- n = 10;
+ n = 10;
if (tc_wait(ENTROPY1_ADDR_STATUS, ENTROPY1_STATUS_VALID, &n) != 0)
return 1;
/* read entropy data */
if (tc_read(ENTROPY1_ADDR_ENTROPY, (uint8_t *)&entropy, 4) != 0)
return 1;
/* display entropy data */
- if (!debug)
-#ifdef WAIT_STATS
- printf("%08lx %d\n", entropy, n);
-#else
- printf("%08lx\n", entropy);
-#endif
+ if (!debug) {
+ if (wait_stats)
+ printf("%08x %d\n", entropy, n);
+ else
+ printf("%08x\n", entropy);
+ }
}
return 0;
@@ -273,26 +188,26 @@ int TC4(void)
int TC5(void)
{
int i, n;
- unsigned long entropy;
+ uint32_t entropy;
if (!quiet)
printf("TC5: Read random data from rosc_entropy.\n");
for (i = 0; i < num_words; ++i) {
/* check status */
- n = 10;
+ n = 10;
if (tc_wait(ENTROPY2_ADDR_STATUS, ENTROPY2_STATUS_VALID, &n) != 0)
return 1;
/* read entropy data */
if (tc_read(ENTROPY2_ADDR_ENTROPY, (uint8_t *)&entropy, 4) != 0)
return 1;
/* display entropy data */
- if (!debug)
-#ifdef WAIT_STATS
- printf("%08lx %d\n", entropy, n);
-#else
- printf("%08lx\n", entropy);
-#endif
+ if (!debug) {
+ if (wait_stats)
+ printf("%08x %d\n", entropy, n);
+ else
+ printf("%08x\n", entropy);
+ }
}
return 0;
@@ -314,26 +229,26 @@ int TC6(void)
int TC7(void)
{
int i, n;
- unsigned long random;
+ uint32_t random;
if (!quiet)
printf("TC7: Read random data from trng_csprng.\n");
for (i = 0; i < num_words; ++i) {
/* check status */
- n = 10;
+ n = 10;
if (tc_wait(CSPRNG_ADDR_STATUS, CSPRNG_STATUS_VALID, &n) != 0)
return 1;
/* read random data */
if (tc_read(CSPRNG_ADDR_RANDOM, (uint8_t *)&random, 4) != 0)
return 1;
/* display random data */
- if (!debug)
-#ifdef WAIT_STATS
- printf("%08lx %d\n", random, n);
-#else
- printf("%08lx\n", random);
-#endif
+ if (!debug) {
+ if (wait_stats)
+ printf("%08x %d\n", random, n);
+ else
+ printf("%08x\n", random);
+ }
}
return 0;
@@ -345,13 +260,11 @@ int main(int argc, char *argv[])
{
typedef int (*tcfp)(void);
tcfp all_tests[] = { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 };
-
- char *usage = "Usage: %s [-h] [-d] [-q] [-n #] [-i I2C_device] [-a I2C_addr] tc...\n";
char *dev = I2C_dev;
int addr = I2C_addr;
int i, j, opt;
- while ((opt = getopt(argc, argv, "h?dqn:i:a:")) != -1) {
+ while ((opt = getopt(argc, argv, "h?dqn:wi:a:")) != -1) {
switch (opt) {
case 'h':
case '?':
@@ -370,6 +283,9 @@ int main(int argc, char *argv[])
return EXIT_FAILURE;
}
break;
+ case 'w':
+ wait_stats = 1;
+ break;
case 'i':
dev = optarg;
break;