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Diffstat (limited to 'i2c/sw/hash_i2c.c')
-rw-r--r--i2c/sw/hash_i2c.c92
1 files changed, 9 insertions, 83 deletions
diff --git a/i2c/sw/hash_i2c.c b/i2c/sw/hash_i2c.c
index c3ca013..04006d3 100644
--- a/i2c/sw/hash_i2c.c
+++ b/i2c/sw/hash_i2c.c
@@ -1,13 +1,13 @@
-/*
+/*
* hash.c
* ------
* This program uses the coretest_hashes subsystem to produce a
* cryptographic hash of a file or input stream. It is a generalization
* of the hash_tester.c test program.
- *
+ *
* Authors: Joachim Strömbergson, Paul Selkirk
* Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
@@ -46,8 +46,9 @@
#include <assert.h>
#include "tc_i2c.h"
+#include "cryptech_memory_map.h"
-char *usage =
+char *usage =
"Usage: %s [-d] [-v] [-q] [-i I2C_device] [-a I2C_addr] [algorithm [file]]\n"
"algorithms: sha-1, sha-256, sha-512/224, sha-512/256, sha-384, sha-512\n";
@@ -55,81 +56,6 @@ int debug = 0;
int quiet = 0;
int verbose = 0;
-/* memory segments for core families */
-#define SEGMENT_OFFSET_GLOBALS 0x0000
-#define SEGMENT_OFFSET_HASHES 0x2000
-#define SEGMENT_OFFSET_RNGS 0x4000
-#define SEGMENT_OFFSET_CIPHERS 0x6000
-
-#define CORE_SIZE 0x100
-
-/* addresses and codes common to all cores */
-#define ADDR_NAME0 0x00
-#define ADDR_NAME1 0x01
-#define ADDR_VERSION 0x02
-
-/* At segment 0, we have board-level register and communication channel registers */
-#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0x00 * CORE_SIZE)
-#define BOARD_ADDR_NAME0 BOARD_ADDR_BASE + ADDR_NAME0
-#define BOARD_ADDR_NAME1 BOARD_ADDR_BASE + ADDR_NAME1
-#define BOARD_ADDR_VERSION BOARD_ADDR_BASE + ADDR_VERSION
-#define BOARD_ADDR_DUMMY BOARD_ADDR_BASE + 0xFF
-
-#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0x01 * CORE_SIZE)
-#define COMM_ADDR_NAME0 COMM_ADDR_BASE + ADDR_NAME0
-#define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1
-#define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION
-
-/* addresses and codes common to all hash cores */
-#define ADDR_CTRL 0x08
-#define CTRL_INIT_CMD 1
-#define CTRL_NEXT_CMD 2
-#define ADDR_STATUS 0x09
-#define STATUS_READY_BIT 1
-#define STATUS_VALID_BIT 2
-#define ADDR_BLOCK 0x10
-#define ADDR_DIGEST 0x20
-
-/* addresses and codes for the specific hash cores */
-#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0*CORE_SIZE)
-#define SHA1_ADDR_NAME0 SHA1_ADDR_BASE + ADDR_NAME0
-#define SHA1_ADDR_NAME1 SHA1_ADDR_BASE + ADDR_NAME1
-#define SHA1_ADDR_VERSION SHA1_ADDR_BASE + ADDR_VERSION
-#define SHA1_ADDR_CTRL SHA1_ADDR_BASE + ADDR_CTRL
-#define SHA1_ADDR_STATUS SHA1_ADDR_BASE + ADDR_STATUS
-#define SHA1_ADDR_BLOCK SHA1_ADDR_BASE + ADDR_BLOCK
-#define SHA1_ADDR_DIGEST SHA1_ADDR_BASE + ADDR_DIGEST
-#define SHA1_BLOCK_LEN 512 / 8
-#define SHA1_DIGEST_LEN 160 / 8
-
-#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1*CORE_SIZE)
-#define SHA256_ADDR_NAME0 SHA256_ADDR_BASE + ADDR_NAME0
-#define SHA256_ADDR_NAME1 SHA256_ADDR_BASE + ADDR_NAME1
-#define SHA256_ADDR_VERSION SHA256_ADDR_BASE + ADDR_VERSION
-#define SHA256_ADDR_CTRL SHA256_ADDR_BASE + ADDR_CTRL
-#define SHA256_ADDR_STATUS SHA256_ADDR_BASE + ADDR_STATUS
-#define SHA256_ADDR_BLOCK SHA256_ADDR_BASE + ADDR_BLOCK
-#define SHA256_ADDR_DIGEST SHA256_ADDR_BASE + ADDR_DIGEST
-#define SHA256_BLOCK_LEN 512 / 8
-#define SHA256_DIGEST_LEN 256 / 8
-
-#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2*CORE_SIZE)
-#define SHA512_ADDR_NAME0 SHA512_ADDR_BASE + ADDR_NAME0
-#define SHA512_ADDR_NAME1 SHA512_ADDR_BASE + ADDR_NAME1
-#define SHA512_ADDR_VERSION SHA512_ADDR_BASE + ADDR_VERSION
-#define SHA512_ADDR_CTRL SHA512_ADDR_BASE + ADDR_CTRL
-#define SHA512_ADDR_STATUS SHA512_ADDR_BASE + ADDR_STATUS
-#define SHA512_ADDR_BLOCK SHA512_ADDR_BASE + ADDR_BLOCK
-#define SHA512_ADDR_DIGEST SHA512_ADDR_BASE + 0x40
-#define SHA512_BLOCK_LEN 1024 / 8
-#define SHA512_224_DIGEST_LEN 224 / 8
-#define SHA512_256_DIGEST_LEN 256 / 8
-#define SHA384_DIGEST_LEN 384 / 8
-#define SHA512_DIGEST_LEN 512 / 8
-#define MODE_SHA_512_224 0 << 2
-#define MODE_SHA_512_256 1 << 2
-#define MODE_SHA_384 2 << 2
-#define MODE_SHA_512 3 << 2
/* ---------------- algorithm lookup code ---------------- */
@@ -205,15 +131,15 @@ int transmit(off_t offset, uint8_t *block, int blen, int mode, int first)
off_t base = offset & ~(0xff);
if (tc_write(offset, block, blen) != 0)
- return EXIT_FAILURE;
+ return 1;
if (first) {
if (tc_init(base + ADDR_CTRL, mode) != 0)
- return EXIT_FAILURE;
+ return 1;
}
else {
if (tc_next(base + ADDR_CTRL, mode) != 0)
- return EXIT_FAILURE;
+ return 1;
}
return tc_wait_ready(base + ADDR_STATUS);
@@ -229,7 +155,7 @@ int pad_transmit(off_t offset, uint8_t *block, uint8_t flen, uint8_t blen,
if (blen - flen < ((blen == 64) ? 8 : 16)) {
if (transmit(offset, block, blen, mode, first) != 0)
- return EXIT_FAILURE;
+ return 1;
first = 0;
memset(block, 0, blen);
}