diff options
Diffstat (limited to 'eim/sw/hash_tester_eim.c')
| -rw-r--r-- | eim/sw/hash_tester_eim.c | 155 |
1 files changed, 30 insertions, 125 deletions
diff --git a/eim/sw/hash_tester_eim.c b/eim/sw/hash_tester_eim.c index 74685ee..e0bcc03 100644 --- a/eim/sw/hash_tester_eim.c +++ b/eim/sw/hash_tester_eim.c @@ -45,41 +45,40 @@ #include <string.h> #include <stdio.h> #include <stdlib.h> -#include <errno.h> -#include <sys/mman.h> -#include <fcntl.h> #include <unistd.h> #include <time.h> #include <sys/time.h> -#include <sys/ioctl.h> -#include <arpa/inet.h> +#include <stdint.h> #include <ctype.h> #include <signal.h> -#include "novena-eim.h" +#include "tc_eim.h" int debug = 0; int quiet = 0; int repeat = 0; +/* memory segments for core families */ #define SEGMENT_OFFSET_GLOBALS EIM_BASE_ADDR + 0x000000 #define SEGMENT_OFFSET_HASHES EIM_BASE_ADDR + 0x010000 #define SEGMENT_OFFSET_RNGS EIM_BASE_ADDR + 0x020000 #define SEGMENT_OFFSET_CIPHERS EIM_BASE_ADDR + 0x030000 +#define CORE_SIZE (0x100 << 2) + /* addresses and codes common to all cores */ #define ADDR_NAME0 (0x0 << 2) #define ADDR_NAME1 (0x1 << 2) #define ADDR_VERSION (0x2 << 2) /* At segment 0, we have board-level register and communication channel registers */ -#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0000 +#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0x00 * CORE_SIZE) #define BOARD_ADDR_NAME0 BOARD_ADDR_BASE + ADDR_NAME0 #define BOARD_ADDR_NAME1 BOARD_ADDR_BASE + ADDR_NAME1 #define BOARD_ADDR_VERSION BOARD_ADDR_BASE + ADDR_VERSION #define BOARD_ADDR_DUMMY BOARD_ADDR_BASE + (0xFF << 2) -#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0400 +#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0x01 * CORE_SIZE) #define COMM_ADDR_NAME0 COMM_ADDR_BASE + ADDR_NAME0 #define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1 #define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION @@ -94,10 +93,8 @@ int repeat = 0; #define ADDR_BLOCK (0x10 << 2) #define ADDR_DIGEST (0x20 << 2) -#define HASH_CORE_SIZE (0x100 << 2) - /* addresses and codes for the specific hash cores */ -#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0*HASH_CORE_SIZE) +#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0*CORE_SIZE) #define SHA1_ADDR_NAME0 SHA1_ADDR_BASE + ADDR_NAME0 #define SHA1_ADDR_NAME1 SHA1_ADDR_BASE + ADDR_NAME1 #define SHA1_ADDR_VERSION SHA1_ADDR_BASE + ADDR_VERSION @@ -108,7 +105,7 @@ int repeat = 0; #define SHA1_BLOCK_LEN 512 / 8 #define SHA1_DIGEST_LEN 160 / 8 -#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1*HASH_CORE_SIZE) +#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1*CORE_SIZE) #define SHA256_ADDR_NAME0 SHA256_ADDR_BASE + ADDR_NAME0 #define SHA256_ADDR_NAME1 SHA256_ADDR_BASE + ADDR_NAME1 #define SHA256_ADDR_VERSION SHA256_ADDR_BASE + ADDR_VERSION @@ -119,14 +116,14 @@ int repeat = 0; #define SHA256_BLOCK_LEN 512 / 8 #define SHA256_DIGEST_LEN 256 / 8 -#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2*HASH_CORE_SIZE) +#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2*CORE_SIZE) #define SHA512_ADDR_NAME0 SHA512_ADDR_BASE + ADDR_NAME0 #define SHA512_ADDR_NAME1 SHA512_ADDR_BASE + ADDR_NAME1 #define SHA512_ADDR_VERSION SHA512_ADDR_BASE + ADDR_VERSION #define SHA512_ADDR_CTRL SHA512_ADDR_BASE + ADDR_CTRL #define SHA512_ADDR_STATUS SHA512_ADDR_BASE + ADDR_STATUS #define SHA512_ADDR_BLOCK SHA512_ADDR_BASE + ADDR_BLOCK -#define SHA512_ADDR_DIGEST SHA512_ADDR_BASE + 0x100 +#define SHA512_ADDR_DIGEST SHA512_ADDR_BASE + (0x40 << 2) #define SHA512_BLOCK_LEN 1024 / 8 #define SHA512_224_DIGEST_LEN 224 / 8 #define SHA512_256_DIGEST_LEN 256 / 8 @@ -306,75 +303,6 @@ const uint8_t SHA512_DOUBLE_DIGEST[] = /* ---------------- test-case low-level code ---------------- */ -void dump(char *label, const uint8_t *buf, int len) -{ - if (debug) { - int i; - printf("%s [", label); - for (i = 0; i < len; ++i) - printf(" %02x", buf[i]); - printf(" ]\n"); - } -} - -int tc_write(off_t offset, const uint8_t *buf, int len) -{ - dump("write ", buf, len); - - for (; len > 0; offset += 4, buf += 4, len -= 4) { - uint32_t val; - val = htonl(*(uint32_t *)buf); - eim_write_32(offset, &val); - } - - return 0; -} - -int tc_read(off_t offset, uint8_t *buf, int len) -{ - uint8_t *rbuf = buf; - int rlen = len; - - for (; rlen > 0; offset += 4, rbuf += 4, rlen -= 4) { - uint32_t val; - eim_read_32(offset, &val); - *(uint32_t *)rbuf = ntohl(val); - } - - dump("read ", buf, len); - - return 0; -} - -int tc_expected(off_t offset, const uint8_t *expected, int len) -{ - uint8_t *buf; - int i; - - buf = malloc(len); - if (buf == NULL) { - perror("malloc"); - return 1; - } - dump("expect", expected, len); - - if (tc_read(offset, buf, len) != 0) - goto errout; - - for (i = 0; i < len; ++i) - if (buf[i] != expected[i]) { - fprintf(stderr, "response byte %d: expected 0x%02x, got 0x%02x\n", - i, expected[i], buf[i]); - goto errout; - } - - free(buf); - return 0; -errout: - free(buf); - return 1; -} - int tc_init(off_t offset) { uint8_t buf[4] = { 0, 0, 0, CTRL_INIT_CMD }; @@ -389,51 +317,27 @@ int tc_next(off_t offset) return tc_write(offset, buf, 4); } -int tc_wait(off_t offset, uint8_t status) -{ - uint8_t buf[4]; - -#if 0 - do { - if (tc_read(offset, buf, 4) != 0) - return 1; - } while (!(buf[3] & status)); - - return 0; -#else - int i; - for (i = 0; i < 10; ++i) { - if (tc_read(offset, buf, 4) != 0) - return 1; - if (buf[3] & status) - return 0; - } - fprintf(stderr, "tc_wait timed out\n"); - return 1; -#endif -} - int tc_wait_ready(off_t offset) { - return tc_wait(offset, STATUS_READY_BIT); + return tc_wait(offset, STATUS_READY_BIT, NULL); } int tc_wait_valid(off_t offset) { - return tc_wait(offset, STATUS_VALID_BIT); + return tc_wait(offset, STATUS_VALID_BIT, NULL); } /* ---------------- sanity test case ---------------- */ int TC0() { - uint8_t board_name0[4] = { 'P', 'V', 'T', '1'}; - uint8_t board_name1[4] = { ' ', ' ', ' ', ' '}; - uint8_t board_version[4] = { '0', '.', '1', '0'}; + uint8_t board_name0[4] = "PVT1"; + uint8_t board_name1[4] = " "; + uint8_t board_version[4] = "0.10"; - uint8_t comm_name0[4] = { 'e', 'i', 'm', ' '}; - uint8_t comm_name1[4] = { ' ', ' ', ' ', ' '}; - uint8_t comm_version[4] = { '0', '.', '1', '0'}; + uint8_t comm_name0[4] = "eim "; + uint8_t comm_name1[4] = " "; + uint8_t comm_version[4] = "0.10"; uint8_t t[4]; @@ -444,7 +348,8 @@ int TC0() * to make sure that we can actually write something into EIM */ (void)time((time_t *)t); - tc_write(BOARD_ADDR_DUMMY, (void *)&t, 4); + if (tc_write(BOARD_ADDR_DUMMY, (void *)&t, 4) != 0) + return 1; if (tc_expected(BOARD_ADDR_NAME0, board_name0, 4) || tc_expected(BOARD_ADDR_NAME1, board_name1, 4) || @@ -466,9 +371,9 @@ int TC0() /* TC1: Read name and version from SHA-1 core. */ int TC1(void) { - uint8_t name0[4] = { 0x73, 0x68, 0x61, 0x31 }; /* "sha1" */ - uint8_t name1[4] = { 0x20, 0x20, 0x20, 0x20 }; /* " " */ - uint8_t version[4] = { 0x30, 0x2e, 0x35, 0x30 }; /* "0.50" */ + uint8_t name0[4] = "sha1"; + uint8_t name1[4] = " "; + uint8_t version[4] = "0.50"; if (!quiet) printf("TC1: Reading name and version words from SHA-1 core.\n"); @@ -535,9 +440,9 @@ int TC3(void) /* TC4: Read name and version from SHA-256 core. */ int TC4(void) { - uint8_t name0[4] = { 0x73, 0x68, 0x61, 0x32 }; /* "sha2" */ - uint8_t name1[4] = { 0x2d, 0x32, 0x35, 0x36 }; /* "-256" */ - uint8_t version[4] = { 0x30, 0x2e, 0x38, 0x30 }; /* "0.80" */ + uint8_t name0[4] = "sha2"; + uint8_t name1[4] = "-256"; + uint8_t version[4] = "0.80"; if (!quiet) printf("TC4: Reading name, type and version words from SHA-256 core.\n"); @@ -652,9 +557,9 @@ int TC7() /* TC8: Read name and version from SHA-512 core. */ int TC8() { - uint8_t name0[4] = { 0x73, 0x68, 0x61, 0x32 }; /* "sha2" */ - uint8_t name1[4] = { 0x2d, 0x35, 0x31, 0x32 }; /* "-512" */ - uint8_t version[4] = { 0x30, 0x2e, 0x38, 0x30 }; /* "0.80" */ + uint8_t name0[4] = "sha2"; + uint8_t name1[4] = "-512"; + uint8_t version[4] = "0.80"; if (!quiet) printf("TC8: Reading name, type and version words from SHA-512 core.\n"); |