diff options
Diffstat (limited to 'config/core_selector.v')
-rw-r--r-- | config/core_selector.v | 38 |
1 files changed, 28 insertions, 10 deletions
diff --git a/config/core_selector.v b/config/core_selector.v index 0f60771..3c0a31f 100644 --- a/config/core_selector.v +++ b/config/core_selector.v @@ -62,6 +62,9 @@ module core_selector .error(error_board_regs) ); + reg [31: 0] read_data_board_regs_reg; + always @(posedge sys_clk) + read_data_board_regs_reg <= read_data_board_regs; //---------------------------------------------------------------- @@ -85,6 +88,9 @@ module core_selector .error(error_comm_regs) ); + reg [31: 0] read_data_comm_regs_reg; + always @(posedge sys_clk) + read_data_comm_regs_reg <= read_data_comm_regs; //---------------------------------------------------------------- @@ -108,6 +114,9 @@ module core_selector .error(error_sha256) ); + reg [31: 0] read_data_sha256_reg; + always @(posedge sys_clk) + read_data_sha256_reg <= read_data_sha256; //---------------------------------------------------------------- @@ -131,6 +140,9 @@ module core_selector .error(error_aes) ); + reg [31: 0] read_data_aes_reg; + always @(posedge sys_clk) + read_data_aes_reg <= read_data_aes; //---------------------------------------------------------------- @@ -158,6 +170,9 @@ module core_selector .debug(debug) ); + reg [31: 0] read_data_trng_reg; + always @(posedge sys_clk) + read_data_trng_reg <= read_data_trng; //---------------------------------------------------------------- @@ -180,6 +195,9 @@ module core_selector .read_data(read_data_modexp) ); + reg [31: 0] read_data_modexp_reg; + always @(posedge sys_clk) + read_data_modexp_reg <= read_data_modexp; @@ -196,52 +214,52 @@ module core_selector case (addr_core_num) CORE_ADDR_BOARD_REGS: begin - sys_read_data_mux = read_data_board_regs; + sys_read_data_mux = read_data_board_regs_reg; sys_error_mux = error_board_regs; end CORE_ADDR_COMM_REGS: begin - sys_read_data_mux = read_data_comm_regs; + sys_read_data_mux = read_data_comm_regs_reg; sys_error_mux = error_comm_regs; end CORE_ADDR_SHA256: begin - sys_read_data_mux = read_data_sha256; + sys_read_data_mux = read_data_sha256_reg; sys_error_mux = error_sha256; end CORE_ADDR_AES: begin - sys_read_data_mux = read_data_aes; + sys_read_data_mux = read_data_aes_reg; sys_error_mux = error_aes; end CORE_ADDR_TRNG: begin - sys_read_data_mux = read_data_trng; + sys_read_data_mux = read_data_trng_reg; sys_error_mux = error_trng; end CORE_ADDR_AVALANCHE_ENTROPY: begin - sys_read_data_mux = read_data_trng; + sys_read_data_mux = read_data_trng_reg; sys_error_mux = error_trng; end CORE_ADDR_ROSC_ENTROPY: begin - sys_read_data_mux = read_data_trng; + sys_read_data_mux = read_data_trng_reg; sys_error_mux = error_trng; end CORE_ADDR_TRNG_MIXER: begin - sys_read_data_mux = read_data_trng; + sys_read_data_mux = read_data_trng_reg; sys_error_mux = error_trng; end CORE_ADDR_TRNG_CSPRNG: begin - sys_read_data_mux = read_data_trng; + sys_read_data_mux = read_data_trng_reg; sys_error_mux = error_trng; end CORE_ADDR_MODEXP: begin - sys_read_data_mux = read_data_modexp; + sys_read_data_mux = read_data_modexp_reg; sys_error_mux = 0; end |