1 files changed, 24 insertions, 45 deletions

diff --git a/config/config.py b/config/config.py
index ddf7d0b..970b339 100755
--- a/config/config.py
+++ b/config/config.py
@@ -101,6 +101,10 @@ class Core(object):
     def upper_instance_name(self):
         return self.instance_name.upper()
 
+    @property
+    def reset_pin(self):
+        return ".rst(sys_rst)"
+
     def createInstance(self):
         return createInstance_template_generic.format(core = self)
 
@@ -114,14 +118,15 @@ class Core(object):
         return "".join(" \\\n\t$(CORE_TREE)/" + vfile for vfile in self.vfiles)
 
 
-class BoardCore(Core):
+class InvertedResetCore(Core):
     """
-    Board-level cores have a slightly different API, which we handle
-    with a different template, at least for now.
+    Core which inverts the reset signal.  Seems to vary by author.
+    No, I don't know why we don't just pick one convention or the other.
     """
 
-    def createInstance(self):
-        return createInstance_template_board.format(core = self)
+    @property
+    def reset_pin(self):
+        return ".reset_n(~sys_rst)"
 
 
 class SubCore(Core):
@@ -137,7 +142,7 @@ class SubCore(Core):
         return createMux_template.format(core = self, core0 = self.parent)
 
 
-class TRNGCore(Core):
+class TRNGCore(InvertedResetCore):
     """
     The TRNG core has an internal mux and a collection of sub-cores.
     Mostly this means that our method calls have to iterate over all
@@ -166,12 +171,16 @@ class TRNGCore(Core):
     def createMux(self):
         return super(TRNGCore, self).createMux() + "".join(subcore.createMux() for subcore in self.subcores)
 
-# Hook special classes in as handlers for the cores that require them
+# Hook special classes in as handlers for the cores that require them.
 
 Core.special_class.update(
-    board_regs = BoardCore,
-    comm_regs  = BoardCore,
-    trng       = TRNGCore)
+    trng        = TRNGCore,
+    aes         = InvertedResetCore,
+    chacha      = InvertedResetCore,
+    sha1        = InvertedResetCore,
+    sha256      = InvertedResetCore,
+    sha512      = InvertedResetCore,
+    modexp      = InvertedResetCore)
 
 
 # Templates (format strings), here instead of inline in the functions
@@ -191,14 +200,14 @@ createInstance_template_generic = """\
    //----------------------------------------------------------------
    // {core.upper_instance_name}
    //----------------------------------------------------------------
-   wire                 enable_{core.instance_name} = sys_ena && (addr_core_num == CORE_ADDR_{core.upper_instance_name});
+   wire                 enable_{core.instance_name} = (addr_core_num == CORE_ADDR_{core.upper_instance_name});
    wire [31: 0]         read_data_{core.instance_name};
    wire                 error_{core.instance_name};
 
    {core.name} {core.instance_name}_inst
      (
       .clk(sys_clk),
-      .reset_n(~sys_rst),
+      {core.reset_pin},
 
       .cs(enable_{core.instance_name} & (sys_eim_rd | sys_eim_wr)),
       .we(sys_eim_wr),
@@ -211,41 +220,9 @@ createInstance_template_generic = """\
 
 """
 
-# Template used by BoardCore.createInstance().  This has minor
-# differences from the generic template, maybe we can merge them, or
-# maybe we can do something about the (gratuitous?) differences that
-# make this necessary.
-
-createInstance_template_board = """\
-   //----------------------------------------------------------------
-   // {core.upper_instance_name}
-   //----------------------------------------------------------------
-   wire                 enable_{core.instance_name} = sys_ena && (addr_core_num == CORE_ADDR_{core.upper_instance_name});
-   wire [31: 0]         read_data_{core.instance_name};
-   wire                 error_{core.instance_name};
-
-   {core.name} {core.instance_name}_inst
-     (
-      .clk(sys_clk),
-      .rst(sys_rst),
-
-      .cs(enable_{core.instance_name} & (sys_eim_rd | sys_eim_wr)),
-      .we(sys_eim_wr),
-
-      .address(addr_core_reg),
-      .write_data(sys_write_data),
-      .read_data(read_data_{core.instance_name}),
-      .error(error_{core.instance_name})
-      );
-
-
-"""
-
 # Template used by TRNGCore.createInstance(); this is different enough
 # from the generic template that it's (probably) clearer to have this
 # separate.
-#
-# Should this also be checking sys_ena?  Not obvious to me either way.
 
 createInstance_template_TRNG = """\
    //----------------------------------------------------------------
@@ -259,7 +236,7 @@ createInstance_template_TRNG = """\
    {core.name} {core.instance_name}_inst
      (
       .clk(sys_clk),
-      .reset_n(~sys_rst),
+      {core.reset_pin},
 
       .cs(enable_{core.instance_name} & (sys_eim_rd | sys_eim_wr)),
       .we(sys_eim_wr),
@@ -353,6 +330,8 @@ endmodule
 # Template for makefile snippet listing Verilog source files.
 
 listVfiles_template = """\
+# NOTE: This file is generated; do not edit by hand.
+
 vfiles +={vfiles}
 """