diff options
Diffstat (limited to 'common/rtl/novena_clkmgr.v')
| -rw-r--r-- | common/rtl/novena_clkmgr.v | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/common/rtl/novena_clkmgr.v b/common/rtl/novena_clkmgr.v index 97db451..9151e93 100644 --- a/common/rtl/novena_clkmgr.v +++ b/common/rtl/novena_clkmgr.v @@ -39,19 +39,21 @@ module novena_clkmgr ( - input wire gclk_p, // signal from clock pins - input wire gclk_n, // + input wire gclk_p, // signal from clock pins + input wire gclk_n, // - input wire reset_mcu_b, // cpu reset (async) + input wire reset_mcu_b, // cpu reset (async, active-low) - output wire sys_clk, // buffered system clock output - output wire sys_rst // system reset output (sync) + output wire sys_clk, // buffered system clock output + output wire sys_rst // system reset output (sync, active-high) ); + // - // Ports + // Parameters // - + parameter CLK_OUT_MUL = 2; + parameter CLK_OUT_DIV = 2; // // IBUFGDS @@ -70,18 +72,23 @@ module novena_clkmgr // // DCM // - wire dcm_reset; // dcm reset - wire dcm_locked; // output clock valid + wire dcm_reset; // dcm reset + wire dcm_locked; // output clock valid wire gclk_missing; // no input clock - clkmgr_dcm dcm + clkmgr_dcm # + ( + .CLK_OUT_MUL (CLK_OUT_MUL), + .CLK_OUT_DIV (CLK_OUT_DIV) + ) + dcm ( - .CLK_IN1(gclk), - .RESET(dcm_reset), - .INPUT_CLK_STOPPED(gclk_missing), + .clk_in (gclk), + .reset_in (dcm_reset), + .gclk_missing_out (gclk_missing), - .CLK_OUT1(sys_clk), - .CLK_VALID(dcm_locked) + .clk_out (sys_clk), + .clk_valid_out (dcm_locked) ); |