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-rw-r--r--common/rtl/lint-dummy.v14
-rw-r--r--common/rtl/novena_regs.v4
-rwxr-xr-xconfig/config.py4
-rw-r--r--eim/build/xilinx.mk16
-rw-r--r--eim/rtl/novena_eim.v4
-rw-r--r--i2c/build/xilinx.mk16
-rw-r--r--i2c/rtl/novena_i2c.v14
-rw-r--r--sw/capability.c6
-rw-r--r--sw/configure-fpga.sh6
-rw-r--r--sw/modexps6_tester.c224
-rw-r--r--sw/novena-eim.c16
-rw-r--r--sw/tc_eim.c6
-rw-r--r--sw/tc_i2c.c6
13 files changed, 168 insertions, 168 deletions
diff --git a/common/rtl/lint-dummy.v b/common/rtl/lint-dummy.v
index 9d4d2d3..5cf4b61 100644
--- a/common/rtl/lint-dummy.v
+++ b/common/rtl/lint-dummy.v
@@ -69,7 +69,7 @@ module FD (Q, C, D);
input C, D;
endmodule
-module DSP48A1 (BCOUT, CARRYOUT, CARRYOUTF, M, P, PCOUT, A, B, C, CARRYIN, CEA, CEB, CEC, CECARRYIN, CED, CEM, CEOPMODE, CEP, CLK, D, OPMODE, PCIN, RSTA, RSTB, RSTC, RSTCARRYIN, RSTD, RSTM, RSTOPMODE, RSTP);
+module DSP48A1 (BCOUT, CARRYOUT, CARRYOUTF, M, P, PCOUT, A, B, C, CARRYIN, CEA, CEB, CEC, CECARRYIN, CED, CEM, CEOPMODE, CEP, CLK, D, OPMODE, PCIN, RSTA, RSTB, RSTC, RSTCARRYIN, RSTD, RSTM, RSTOPMODE, RSTP);
parameter integer A0REG = 0;
parameter integer A1REG = 1;
parameter integer B0REG = 0;
@@ -83,11 +83,11 @@ module DSP48A1 (BCOUT, CARRYOUT, CARRYOUTF, M, P, PCOUT, A, B, C, CARRYIN, CEA,
parameter integer OPMODEREG = 1;
parameter integer PREG = 1;
parameter RSTTYPE = "SYNC";
- output [17:0] BCOUT;
- output CARRYOUT;
- output CARRYOUTF;
- output [35:0] M;
- output [47:0] P;
+ output [17:0] BCOUT;
+ output CARRYOUT;
+ output CARRYOUTF;
+ output [35:0] M;
+ output [47:0] P;
output [47:0] PCOUT;
input [17:0] A;
input [17:0] B;
@@ -110,7 +110,7 @@ module DSP48A1 (BCOUT, CARRYOUT, CARRYOUTF, M, P, PCOUT, A, B, C, CARRYIN, CEA,
input RSTC;
input RSTCARRYIN;
input RSTD;
- input RSTM;
+ input RSTM;
input RSTOPMODE;
input RSTP;
endmodule
diff --git a/common/rtl/novena_regs.v b/common/rtl/novena_regs.v
index eb89092..6b52a80 100644
--- a/common/rtl/novena_regs.v
+++ b/common/rtl/novena_regs.v
@@ -86,13 +86,13 @@ module board_regs
wire [31 : 0] core_name0 = CORE_NAME0;
wire [31 : 0] core_name1 = CORE_NAME1;
wire [31 : 0] core_version = CORE_VERSION;
-
+
//----------------------------------------------------------------
// Concurrent connectivity for ports etc.
//----------------------------------------------------------------
assign read_data = tmp_read_data;
assign error = write_error | read_error;
-
+
//----------------------------------------------------------------
// storage registers for mapping memory to core interface
//----------------------------------------------------------------
diff --git a/config/config.py b/config/config.py
index 86c8615..bdbda1a 100755
--- a/config/config.py
+++ b/config/config.py
@@ -79,7 +79,7 @@ def createInstance(core):
s4 = ""
s5 = "addr_core_reg"
s6 = ""
-
+
return "\
//----------------------------------------------------------------\n\
// {1}\n\
@@ -126,7 +126,7 @@ def createModule(cores):
cores[j] += '_' + str(i)
i += 1
j += 1
-
+
addrs = ""
insts = ""
muxs = ""
diff --git a/eim/build/xilinx.mk b/eim/build/xilinx.mk
index 8a81ef9..7a8d9d4 100644
--- a/eim/build/xilinx.mk
+++ b/eim/build/xilinx.mk
@@ -1,6 +1,6 @@
# The top level module should define the variables below then include
# this file. The files listed should be in the same directory as the
-# Makefile.
+# Makefile.
#
# variable description
# ---------- -------------
@@ -11,7 +11,7 @@
# vfiles all local .v files
# xilinx_cores all local .xco files
# vendor vendor of FPGA (xilinx, altera, etc.)
-# family FPGA device family (spartan3e)
+# family FPGA device family (spartan3e)
# part FPGA part name (xc4vfx12-10-sf363)
# flashsize size of flash for mcs file (16384)
# optfile (optional) xst extra opttions file to put in .scr
@@ -40,7 +40,7 @@ xil_env ?= . $(isedir)/settings32.sh
flashsize ?= 8192
ucf ?= $(project).ucf
-libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs))
+libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs))
mkfiles = $(libmks) xilinx.mk
include $(libmks)
@@ -110,9 +110,9 @@ $(project)_par.ncd: $(project).ncd
:; \
else \
$(MAKE) etwr; \
- fi
-junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad
-junk += $(project)_par_pad.csv $(project)_par_pad.txt
+ fi
+junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad
+junk += $(project)_par_pad.csv $(project)_par_pad.txt
junk += $(project)_par.grf $(project)_par.ptwx
junk += $(project)_par.unroutes $(project)_par.xpi
@@ -126,7 +126,7 @@ $(project).ncd: $(project).ngd
$(xil_env); \
map $(intstyle) $(map_opts) $$smartguide $<
junk += $(project).ncd $(project).pcf $(project).ngm $(project).mrp $(project).map
-junk += smartguide.ncd $(project).psr
+junk += smartguide.ncd $(project).psr
junk += $(project)_summary.xml $(project)_usage.xml
$(project).ngd: $(project).ngc $(ucf)
@@ -135,7 +135,7 @@ junk += $(project).ngd $(project).bld
$(project).ngc: $(vfiles) $(local_corengcs) $(project).scr $(project).prj
$(xil_env); xst $(intstyle) -ifn $(project).scr
-junk += xlnx_auto* $(top_module).lso $(project).srp
+junk += xlnx_auto* $(top_module).lso $(project).srp
junk += netlist.lst xst $(project).ngc
$(project).prj: $(vfiles) $(mkfiles)
diff --git a/eim/rtl/novena_eim.v b/eim/rtl/novena_eim.v
index 1a1b1f6..c774b6c 100644
--- a/eim/rtl/novena_eim.v
+++ b/eim/rtl/novena_eim.v
@@ -56,7 +56,7 @@ module novena_top
input wire eim_bclk, // EIM burst clock. Started by the CPU.
input wire eim_cs0_n, // Chip select (active low).
inout wire [15 : 0] eim_da, // Bidirectional address and data port.
- input wire [18: 16] eim_a, // MSB part of address port.
+ input wire [18: 16] eim_a, // MSB part of address port.
input wire eim_lba_n, // Latch address signal (active low).
input wire eim_wr_n, // write enable signal (active low).
input wire eim_oe_n, // output enable signal (active low).
@@ -158,7 +158,7 @@ module novena_top
.noise(ct_noise),
.debug(ct_led)
- );
+ );
//----------------------------------------------------------------
diff --git a/i2c/build/xilinx.mk b/i2c/build/xilinx.mk
index f35cc98..cace9c1 100644
--- a/i2c/build/xilinx.mk
+++ b/i2c/build/xilinx.mk
@@ -1,6 +1,6 @@
# The top level module should define the variables below then include
# this file. The files listed should be in the same directory as the
-# Makefile.
+# Makefile.
#
# variable description
# ---------- -------------
@@ -11,7 +11,7 @@
# vfiles all local .v files
# xilinx_cores all local .xco files
# vendor vendor of FPGA (xilinx, altera, etc.)
-# family FPGA device family (spartan3e)
+# family FPGA device family (spartan3e)
# part FPGA part name (xc4vfx12-10-sf363)
# flashsize size of flash for mcs file (16384)
# optfile (optional) xst extra opttions file to put in .scr
@@ -38,7 +38,7 @@ xil_env ?= . $(isedir)/settings32.sh
flashsize ?= 8192
ucf ?= $(project).ucf
-libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs))
+libmks = $(patsubst %,$(libdir)/%/module.mk,$(libs))
mkfiles = $(libmks) xilinx.mk
include $(libmks)
@@ -108,9 +108,9 @@ $(project)_par.ncd: $(project).ncd
:; \
else \
$(MAKE) etwr; \
- fi
-junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad
-junk += $(project)_par_pad.csv $(project)_par_pad.txt
+ fi
+junk += $(project)_par.ncd $(project)_par.par $(project)_par.pad
+junk += $(project)_par_pad.csv $(project)_par_pad.txt
junk += $(project)_par.grf $(project)_par.ptwx
junk += $(project)_par.unroutes $(project)_par.xpi
@@ -124,7 +124,7 @@ $(project).ncd: $(project).ngd
$(xil_env); \
map $(intstyle) $(map_opts) $$smartguide $<
junk += $(project).ncd $(project).pcf $(project).ngm $(project).mrp $(project).map
-junk += smartguide.ncd $(project).psr
+junk += smartguide.ncd $(project).psr
junk += $(project)_summary.xml $(project)_usage.xml
$(project).ngd: $(project).ngc $(ucf)
@@ -133,7 +133,7 @@ junk += $(project).ngd $(project).bld
$(project).ngc: $(vfiles) $(local_corengcs) $(project).scr $(project).prj
$(xil_env); xst $(intstyle) -ifn $(project).scr
-junk += xlnx_auto* $(top_module).lso $(project).srp
+junk += xlnx_auto* $(top_module).lso $(project).srp
junk += netlist.lst xst $(project).ngc
$(project).prj: $(vfiles) $(mkfiles)
diff --git a/i2c/rtl/novena_i2c.v b/i2c/rtl/novena_i2c.v
index d1833b2..f6230a0 100644
--- a/i2c/rtl/novena_i2c.v
+++ b/i2c/rtl/novena_i2c.v
@@ -53,7 +53,7 @@ module novena_top
// I2C interface
input wire i2c_scl,
inout wire i2c_sda,
-
+
// Novena utility ports
output wire apoptosis_pin, // Hold low to not restart after config.
output wire led_pin // LED on edge close to the FPGA.
@@ -94,7 +94,7 @@ module novena_top
wire sda_pd;
wire sda_int;
-
+
wire clk = sys_clk;
wire reset_n = ~sys_rst;
@@ -139,7 +139,7 @@ module novena_top
.rxd_syn(i2c_rxd_syn),
.rxd_data(i2c_rxd_data),
.rxd_ack(i2c_rxd_ack),
-
+
// Internal transmit interface.
.txd_syn(i2c_txd_syn),
.txd_data(i2c_txd_data),
@@ -150,15 +150,15 @@ module novena_top
(
.clk(clk),
.reset_n(reset_n),
-
+
.rx_syn(i2c_rxd_syn),
.rx_data(i2c_rxd_data),
.rx_ack(i2c_rxd_ack),
-
+
.tx_syn(i2c_txd_syn),
.tx_data(i2c_txd_data),
.tx_ack(i2c_txd_ack),
-
+
// Interface to the core being tested.
.core_reset_n(coretest_reset_n),
.core_cs(coretest_cs),
@@ -195,7 +195,7 @@ module novena_top
.noise(ct_noise),
.debug(ct_led)
- );
+ );
//----------------------------------------------------------------
diff --git a/sw/capability.c b/sw/capability.c
index 9b29c98..051b23a 100644
--- a/sw/capability.c
+++ b/sw/capability.c
@@ -1,11 +1,11 @@
-/*
+/*
* capability.c
* ------------
* This module contains code to probe the FPGA for its installed cores.
- *
+ *
* Author: Paul Selkirk
* Copyright (c) 2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
diff --git a/sw/configure-fpga.sh b/sw/configure-fpga.sh
index 7ebfb6b..c355066 100644
--- a/sw/configure-fpga.sh
+++ b/sw/configure-fpga.sh
@@ -4,10 +4,10 @@ echo "Setting export of reset pin"
echo 135 > /sys/class/gpio/export
echo "setting reset pin to out"
echo out > /sys/class/gpio/gpio135/direction
-echo "flipping reset"
+echo "flipping reset"
echo 0 > /sys/class/gpio/gpio135/value
echo 1 > /sys/class/gpio/gpio135/value
-echo "configuring FPGA"
+echo "configuring FPGA"
dd if=${bitfile} of=/dev/spidev2.0 bs=128
-echo "turning on clock to FPGA"
+echo "turning on clock to FPGA"
devmem3 0x020c8160 w 0x00000D2B
diff --git a/sw/modexps6_tester.c b/sw/modexps6_tester.c
index a9e3b74..b76a6b3 100644
--- a/sw/modexps6_tester.c
+++ b/sw/modexps6_tester.c
@@ -23,10 +23,10 @@ int repeat = 0;
int tc_width(off_t offset, uint32_t length)
{
length = htonl(length); // !
-
+
uint8_t width[4];
memcpy(width, &length, 4);
-
+
return tc_write(offset, width, sizeof(width));
}
@@ -79,7 +79,7 @@ int TC0(void)
int TC1(void)
{
int ret;
-
+
if (!quiet)
printf("TC1: Sign 1024-bit message (fast & unsafe public mode).\n");
@@ -93,37 +93,37 @@ int TC1(void)
/*uint8_t mode_slow_secure[] = {0, 0, 0, 0};*/
uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};
tc_write(MODEXPS6_ADDR_MODE, mode_fast_unsafe, sizeof(mode_fast_unsafe));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -131,7 +131,7 @@ int TC1(void)
int TC2(void)
{
int ret;
-
+
if (!quiet)
printf("TC2: Sign 1024-bit message (slow & secure private mode).\n");
@@ -145,37 +145,37 @@ int TC2(void)
uint8_t mode_slow_secure[] = {0, 0, 0, 0};
/*uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};*/
tc_write(MODEXPS6_ADDR_MODE, mode_slow_secure, sizeof(mode_slow_secure));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -183,7 +183,7 @@ int TC2(void)
int TC3(void)
{
int ret;
-
+
if (!quiet)
printf("TC3: Sign 2048-bit message (fast & unsafe public mode).\n");
@@ -197,37 +197,37 @@ int TC3(void)
/*uint8_t mode_slow_secure[] = {0, 0, 0, 0};*/
uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};
tc_write(MODEXPS6_ADDR_MODE, mode_fast_unsafe, sizeof(mode_fast_unsafe));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -235,7 +235,7 @@ int TC3(void)
int TC4(void)
{
int ret;
-
+
if (!quiet)
printf("TC4: Sign 2048-bit message (slow & secure private mode).\n");
@@ -249,37 +249,37 @@ int TC4(void)
uint8_t mode_slow_secure[] = {0, 0, 0, 0};
/*uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};*/
tc_write(MODEXPS6_ADDR_MODE, mode_slow_secure, sizeof(mode_slow_secure));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -287,7 +287,7 @@ int TC4(void)
int TC5(void)
{
int ret;
-
+
if (!quiet)
printf("TC5: Sign 4096-bit message (fast & unsafe public mode).\n");
@@ -301,37 +301,37 @@ int TC5(void)
/*uint8_t mode_slow_secure[] = {0, 0, 0, 0};*/
uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};
tc_write(MODEXPS6_ADDR_MODE, mode_fast_unsafe, sizeof(mode_fast_unsafe));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -339,7 +339,7 @@ int TC5(void)
int TC6(void)
{
int ret;
-
+
if (!quiet)
printf("TC6: Sign 4096-bit message (slow & secure private mode).\n");
@@ -353,37 +353,37 @@ int TC6(void)
uint8_t mode_slow_secure[] = {0, 0, 0, 0};
/*uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};*/
tc_write(MODEXPS6_ADDR_MODE, mode_slow_secure, sizeof(mode_slow_secure));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
@@ -391,7 +391,7 @@ int TC6(void)
int TC7(void)
{
int ret;
-
+
if (!quiet)
printf("TC7: Sign several 1024-bit messages (without pre-calculation every time).\n");
@@ -406,40 +406,40 @@ int TC7(void)
clone_reversed(result_1, s_1024_1);
clone_reversed(result_2, s_1024_2);
clone_reversed(result_3, s_1024_3);
-
+
/* Set fast mode */
/*uint8_t mode_slow_secure[] = {0, 0, 0, 0};*/
uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};
tc_write(MODEXPS6_ADDR_MODE, mode_fast_unsafe, sizeof(mode_fast_unsafe));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Set new exponent length */
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, sizeof(exponent) * 8); // number of bits
/* Write new exponent */
- tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+ tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
+
{
/* Write new message #0 */
tc_write(MODEXPS6_ADDR_MESSAGE, message_0, sizeof(message_0));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result_0, sizeof(result_0));
if (ret) return 1;
@@ -447,13 +447,13 @@ int TC7(void)
{
/* Write new message #1 */
tc_write(MODEXPS6_ADDR_MESSAGE, message_1, sizeof(message_1));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result_1, sizeof(result_1));
if (ret) return 1;
@@ -461,13 +461,13 @@ int TC7(void)
{
/* Write new message #2 */
tc_write(MODEXPS6_ADDR_MESSAGE, message_2, sizeof(message_2));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result_2, sizeof(result_2));
if (ret) return 1;
@@ -475,18 +475,18 @@ int TC7(void)
{
/* Write new message #3 */
tc_write(MODEXPS6_ADDR_MESSAGE, message_3, sizeof(message_3));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result_3, sizeof(result_3));
if (ret) return 1;
}
-
+
return 0;
}
@@ -494,7 +494,7 @@ int TC7(void)
int TC8(void)
{
int ret;
-
+
if (!quiet)
printf("TC8: Verify 4096-bit message (fast mode using public exponent).\n");
@@ -503,46 +503,46 @@ int TC8(void)
clone_reversed(message, s_4096);
clone_reversed(exponent, e_4096);
clone_reversed(result, m_4096);
-
+
/* Set fast mode */
/*uint8_t mode_slow_secure[] = {0, 0, 0, 0};*/
uint8_t mode_fast_unsafe[] = {0, 0, 0, 1};
tc_write(MODEXPS6_ADDR_MODE, mode_fast_unsafe, sizeof(mode_fast_unsafe));
-
+
/* Set new modulus size */
tc_width(MODEXPS6_ADDR_MODULUS_WIDTH, sizeof(modulus) * 8); // number of bits
-
+
/* Write new modulus */
tc_write(MODEXPS6_ADDR_MODULUS, modulus, sizeof(modulus));
-
+
/* Pre-calculate speed-up coefficient */
tc_init(MODEXPS6_ADDR_CTRL);
/* Wait while core is calculating */
tc_wait_ready(MODEXPS6_ADDR_STATUS);
-
+
/* Write new message */
tc_write(MODEXPS6_ADDR_MESSAGE, message, sizeof(message));
-
+
/* Set new exponent length */
#if 1
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, 18); // number of bits
#else
tc_width(MODEXPS6_ADDR_EXPONENT_WIDTH, 24); // number of bits
#endif
-
+
/* Write new exponent */
tc_write(MODEXPS6_ADDR_EXPONENT, exponent, sizeof(exponent));
-
+
/* Start calculation */
tc_next(MODEXPS6_ADDR_CTRL);
-
+
/* Wait while core is calculating */
- tc_wait_valid(MODEXPS6_ADDR_STATUS);
-
+ tc_wait_valid(MODEXPS6_ADDR_STATUS);
+
/* Compare actual result with expected value */
ret = tc_expected(MODEXPS6_ADDR_RESULT, result, sizeof(result));
-
+
return ret;
}
diff --git a/sw/novena-eim.c b/sw/novena-eim.c
index 85bfac0..424fcd7 100644
--- a/sw/novena-eim.c
+++ b/sw/novena-eim.c
@@ -1,12 +1,12 @@
-/*
+/*
* novena-eim.c
* ------------
* This module contains the userland magic to set up and use the EIM bus.
*
- *
+ *
* Author: Pavel Shatov
* Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
@@ -118,9 +118,9 @@ enum IMX6DQ_REGISTER_OFFSET
IOMUXC_SW_PAD_CTL_PAD_EIM_AD15 = 0x020E0464,
IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B = 0x020E0468,
IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK = 0x020E046C,
-
+
CCM_CCGR6 = 0x020C4080,
-
+
EIM_CS0GCR1 = 0x021B8000,
EIM_CS0GCR2 = 0x021B8004,
EIM_CS0RCR1 = 0x021B8008,
@@ -166,17 +166,17 @@ struct CCM_CCGR6
unsigned int cg1_usdhc1 : 2;
unsigned int cg2_usdhc2 : 2;
unsigned int cg3_usdhc3 : 2;
-
+
unsigned int cg3_usdhc4 : 2;
unsigned int cg5_eim_slow : 2;
unsigned int cg6_vdoaxiclk : 2;
unsigned int cg7_vpu : 2;
-
+
unsigned int cg8_reserved : 2;
unsigned int cg9_reserved : 2;
unsigned int cg10_reserved : 2;
unsigned int cg11_reserved : 2;
-
+
unsigned int cg12_reserved : 2;
unsigned int cg13_reserved : 2;
unsigned int cg14_reserved : 2;
diff --git a/sw/tc_eim.c b/sw/tc_eim.c
index 87e90d1..76972cd 100644
--- a/sw/tc_eim.c
+++ b/sw/tc_eim.c
@@ -1,11 +1,11 @@
-/*
+/*
* tc_eim.c
* --------
* This module contains common code to talk to the FPGA over the EIM bus.
- *
+ *
* Author: Paul Selkirk
* Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
diff --git a/sw/tc_i2c.c b/sw/tc_i2c.c
index bcc6be9..c49c5a8 100644
--- a/sw/tc_i2c.c
+++ b/sw/tc_i2c.c
@@ -1,11 +1,11 @@
-/*
+/*
* tc_i2c.c
* --------
* This module contains common code to talk to the FPGA over the I2C bus.
- *
+ *
* Author: Paul Selkirk
* Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 03:22:16 +0000