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authorPaul Selkirk <paul@psgd.org>2015-04-29 17:24:05 -0400
committerPaul Selkirk <paul@psgd.org>2015-04-29 17:24:05 -0400
commit7c4de55cddd48ac4420cfba1387bef9a653712dc (patch)
tree9c2f353188b91c6a1ce36dde31d99b77314472bd /sw
parent6a7b3fe6d5e83fc2ee236aae0799f74c92278685 (diff)
parenta6effa1995fb9500cc66c2584d5f28d7585bba1c (diff)
merge Joachim's commit a6effa1 (with fixes)
Diffstat (limited to 'sw')
-rw-r--r--sw/cryptech.h64
1 files changed, 34 insertions, 30 deletions
diff --git a/sw/cryptech.h b/sw/cryptech.h
index 5afd08c..99d76f7 100644
--- a/sw/cryptech.h
+++ b/sw/cryptech.h
@@ -38,7 +38,8 @@
// Segments.
-#define SEGMENT_SIZE 0x2000
+#define CORE_SIZE 0x100
+#define SEGMENT_SIZE 0x20 * CORE_SIZE
#define SEGMENT_OFFSET_GLOBALS 0 * SEGMENT_SIZE
#define SEGMENT_OFFSET_HASHES 1 * SEGMENT_SIZE
#define SEGMENT_OFFSET_RNGS 2 * SEGMENT_SIZE
@@ -46,10 +47,18 @@
#define SEGMENT_OFFSET_MATH 4 * SEGMENT_SIZE
-// addresses and codes common to all cores
+//------------------------------------------------------------------
+// Addresses and codes common to all cores
+//------------------------------------------------------------------
#define ADDR_NAME0 0x00
#define ADDR_NAME1 0x01
#define ADDR_VERSION 0x02
+#define ADDR_CTRL 0x08
+#define CTRL_INIT_BIT 1
+#define CTRL_NEXT_BIT 2
+#define ADDR_STATUS 0x09
+#define STATUS_READY_BIT 1
+#define STATUS_VALID_BIT 2
// a handy macro from cryptlib
@@ -62,15 +71,13 @@
// Board segment.
// Board-level registers and communication channel registers
//------------------------------------------------------------------
-#define BOARD_CORE_SIZE 0x100
-
-#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0 * BOARD_CORE_SIZE)
+#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0 * CORE_SIZE)
#define BOARD_ADDR_NAME0 BOARD_ADDR_BASE + ADDR_NAME0
#define BOARD_ADDR_NAME1 BOARD_ADDR_BASE + ADDR_NAME1
#define BOARD_ADDR_VERSION BOARD_ADDR_BASE + ADDR_VERSION
#define BOARD_ADDR_DUMMY BOARD_ADDR_BASE + 0xFF
-#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (1 * BOARD_CORE_SIZE)
+#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (1 * CORE_SIZE)
#define COMM_ADDR_NAME0 COMM_ADDR_BASE + ADDR_NAME0
#define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1
#define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION
@@ -91,20 +98,14 @@
//------------------------------------------------------------------
// Hashes segment.
//------------------------------------------------------------------
-#define HASH_CORE_SIZE 0x100
-
// addresses and codes common to all hash cores
-#define ADDR_CTRL 0x8
#define CTRL_INIT_CMD 1
#define CTRL_NEXT_CMD 2
-#define ADDR_STATUS 0x9
-#define STATUS_READY_BIT 1
-#define STATUS_VALID_BIT 2
#define ADDR_BLOCK 0x10
#define ADDR_DIGEST 0x20 // except SHA512
// addresses and codes for the specific hash cores.
-#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0 * HASH_CORE_SIZE)
+#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0 * CORE_SIZE)
#define SHA1_ADDR_NAME0 SHA1_ADDR_BASE + ADDR_NAME0
#define SHA1_ADDR_NAME1 SHA1_ADDR_BASE + ADDR_NAME1
#define SHA1_ADDR_VERSION SHA1_ADDR_BASE + ADDR_VERSION
@@ -116,7 +117,7 @@
#define SHA1_LENGTH_LEN bitsToBytes(64)
#define SHA1_DIGEST_LEN bitsToBytes(160)
-#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1 * HASH_CORE_SIZE)
+#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1 * CORE_SIZE)
#define SHA256_ADDR_NAME0 SHA256_ADDR_BASE + ADDR_NAME0
#define SHA256_ADDR_NAME1 SHA256_ADDR_BASE + ADDR_NAME1
#define SHA256_ADDR_VERSION SHA256_ADDR_BASE + ADDR_VERSION
@@ -128,7 +129,7 @@
#define SHA256_LENGTH_LEN bitsToBytes(64)
#define SHA256_DIGEST_LEN bitsToBytes(256)
-#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2 * HASH_CORE_SIZE)
+#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2 * CORE_SIZE)
#define SHA512_ADDR_NAME0 SHA512_ADDR_BASE + ADDR_NAME0
#define SHA512_ADDR_NAME1 SHA512_ADDR_BASE + ADDR_NAME1
#define SHA512_ADDR_VERSION SHA512_ADDR_BASE + ADDR_VERSION
@@ -163,10 +164,8 @@
//-----------------------------------------------------------------
// TRNG segment.
//-----------------------------------------------------------------
-#define TRNG_CORE_SIZE 0x100
-
// addresses and codes for the TRNG cores */
-#define TRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x00 * TRNG_CORE_SIZE)
+#define TRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x00 * CORE_SIZE)
#define TRNG_ADDR_NAME0 TRNG_ADDR_BASE + ADDR_NAME0
#define TRNG_ADDR_NAME1 TRNG_ADDR_BASE + ADDR_NAME1
#define TRNG_ADDR_VERSION TRNG_ADDR_BASE + ADDR_VERSION
@@ -177,7 +176,7 @@
// no status bits defined (yet)
#define TRNG_ADDR_DELAY TRNG_ADDR_BASE + 0x13
-#define ENTROPY1_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x05 * TRNG_CORE_SIZE)
+#define ENTROPY1_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x05 * CORE_SIZE)
#define ENTROPY1_ADDR_NAME0 ENTROPY1_ADDR_BASE + ADDR_NAME0
#define ENTROPY1_ADDR_NAME1 ENTROPY1_ADDR_BASE + ADDR_NAME1
#define ENTROPY1_ADDR_VERSION ENTROPY1_ADDR_BASE + ADDR_VERSION
@@ -188,7 +187,7 @@
#define ENTROPY1_ADDR_ENTROPY ENTROPY1_ADDR_BASE + 0x20
#define ENTROPY1_ADDR_DELTA ENTROPY1_ADDR_BASE + 0x30
-#define ENTROPY2_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x06 * TRNG_CORE_SIZE)
+#define ENTROPY2_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x06 * CORE_SIZE)
#define ENTROPY2_ADDR_NAME0 ENTROPY2_ADDR_BASE + ADDR_NAME0
#define ENTROPY2_ADDR_NAME1 ENTROPY2_ADDR_BASE + ADDR_NAME1
#define ENTROPY2_ADDR_VERSION ENTROPY2_ADDR_BASE + ADDR_VERSION
@@ -202,7 +201,7 @@
#define ENTROPY2_ADDR_RAW ENTROPY2_ADDR_BASE + 0x21
#define ENTROPY2_ADDR_ROSC ENTROPY2_ADDR_BASE + 0x22
-#define MIXER_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0a * TRNG_CORE_SIZE)
+#define MIXER_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0a * CORE_SIZE)
#define MIXER_ADDR_NAME0 MIXER_ADDR_BASE + ADDR_NAME0
#define MIXER_ADDR_NAME1 MIXER_ADDR_BASE + ADDR_NAME1
#define MIXER_ADDR_VERSION MIXER_ADDR_BASE + ADDR_VERSION
@@ -213,7 +212,7 @@
// no status bits defined (yet)
#define MIXER_ADDR_TIMEOUT MIXER_ADDR_BASE + 0x20
-#define CSPRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0b * TRNG_CORE_SIZE)
+#define CSPRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x0b * CORE_SIZE)
#define CSPRNG_ADDR_NAME0 CSPRNG_ADDR_BASE + ADDR_NAME0
#define CSPRNG_ADDR_NAME1 CSPRNG_ADDR_BASE + ADDR_NAME1
#define CSPRNG_ADDR_VERSION CSPRNG_ADDR_BASE + ADDR_VERSION
@@ -247,17 +246,21 @@
// -----------------------------------------------------------------
// MATH segment.
// -----------------------------------------------------------------
-#define MATH_CORE_SIZE 0x100
-
-// addresses and codes for the MATH cores */
-#define MODEXP_ADDR_BASE SEGMENT_OFFSET_MATH + (0x00 * MATH_CORE_SIZE)
+// Modexp core.
+#define GENERAL_PREFIX 0x000
+#define MODULUS_PREFIX 0x100
+#define EXPONENT_PREFIX 0x200
+#define MESSAGE_PREFIX 0x300
+#define RESULT_PREFIX 0x400
+
+#define MODEXP_ADDR_BASE SEGMENT_OFFSET_MATH + (0x00 * CORE_SIZE)
#define MODEXP_ADDR_NAME0 MODEXP_ADDR_BASE + ADDR_NAME0
#define MODEXP_ADDR_NAME1 MODEXP_ADDR_BASE + ADDR_NAME1
#define MODEXP_ADDR_VERSION MODEXP_ADDR_BASE + ADDR_VERSION
-#define MODEXP_ADDR_CTRL MODEXP_ADDR_BASE + 0x08
-#define MODEXP_CTRL_INIT 1
-#define MODEXP_CTRL_NEXT 2
-#define MODEXP_ADDR_STATUS MODEXP_ADDR_BASE + 0x09
+#define MODEXP_ADDR_CTRL MODEXP_ADDR_BASE + ADDR_CTRL
+#define MODEXP_CTRL_INIT_BIT 1
+#define MODEXP_CTRL_NEXT_BIT 2
+#define MODEXP_ADDR_STATUS MODEXP_ADDR_BASE + ADDR_STATUS
#define MODEXP_ADDR_DELAY MODEXP_ADDR_BASE + 0x13
#define MODEXP_STATUS_READY 1
@@ -270,6 +273,7 @@
#define MODEXP_VERSION "0.50"
+
//------------------------------------------------------------------
// Test case public functions
//------------------------------------------------------------------