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authorPaul Selkirk <paul@psgd.org>2015-04-02 15:07:22 -0400
committerPaul Selkirk <paul@psgd.org>2015-04-02 15:07:22 -0400
commitb1ebb2a975de7f29e63c3a4046de15c26b44dceb (patch)
tree20c6e29fa7f51953a83629146bcf61ad556092ab /eim/sw/cryptech_memory_map.h
parentaea9e93e560b1468bf0ff2cf5b61e5409ce60dc5 (diff)
Add trng_extractor app to eim and i2c, refactor i2c apps to use common memory map.
Diffstat (limited to 'eim/sw/cryptech_memory_map.h')
-rw-r--r--eim/sw/cryptech_memory_map.h34
1 files changed, 18 insertions, 16 deletions
diff --git a/eim/sw/cryptech_memory_map.h b/eim/sw/cryptech_memory_map.h
index c392584..c70e69c 100644
--- a/eim/sw/cryptech_memory_map.h
+++ b/eim/sw/cryptech_memory_map.h
@@ -49,26 +49,34 @@
// addresses and codes common to all cores
-#define ADDR_NAME0 (0x0 << 2)
-#define ADDR_NAME1 (0x1 << 2)
-#define ADDR_VERSION (0x2 << 2)
+#define ADDR_NAME0 (0x00 << 2)
+#define ADDR_NAME1 (0x01 << 2)
+#define ADDR_VERSION (0x02 << 2)
//------------------------------------------------------------------
// Board segment.
// Board-level registers and communication channel registers
//------------------------------------------------------------------
-#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0000
+#define BOARD_CORE_SIZE (0x100 << 2)
+
+#define BOARD_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (0 * BOARD_CORE_SIZE)
#define BOARD_ADDR_NAME0 BOARD_ADDR_BASE + ADDR_NAME0
#define BOARD_ADDR_NAME1 BOARD_ADDR_BASE + ADDR_NAME1
#define BOARD_ADDR_VERSION BOARD_ADDR_BASE + ADDR_VERSION
#define BOARD_ADDR_DUMMY BOARD_ADDR_BASE + (0xFF << 2)
-#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + 0x0400
+#define COMM_ADDR_BASE SEGMENT_OFFSET_GLOBALS + (1 * BOARD_CORE_SIZE)
#define COMM_ADDR_NAME0 COMM_ADDR_BASE + ADDR_NAME0
#define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1
#define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION
+
+//------------------------------------------------------------------
+// Hashes segment.
+//------------------------------------------------------------------
+#define HASH_CORE_SIZE (0x100 << 2)
+
// addresses and codes common to all hash cores */
#define ADDR_CTRL (0x8 << 2)
#define CTRL_INIT_CMD 1
@@ -77,16 +85,10 @@
#define STATUS_READY_BIT 1
#define STATUS_VALID_BIT 2
#define ADDR_BLOCK (0x10 << 2)
-#define ADDR_DIGEST (0x20 << 2)
-
-
-//------------------------------------------------------------------
-// Hashes segment.
-//------------------------------------------------------------------
-#define HASH_CORE_SIZE (0x100 << 2)
+#define ADDR_DIGEST (0x20 << 2) // except SHA512
// addresses and codes for the specific hash cores.
-#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0*HASH_CORE_SIZE)
+#define SHA1_ADDR_BASE SEGMENT_OFFSET_HASHES + (0 * HASH_CORE_SIZE)
#define SHA1_ADDR_NAME0 SHA1_ADDR_BASE + ADDR_NAME0
#define SHA1_ADDR_NAME1 SHA1_ADDR_BASE + ADDR_NAME1
#define SHA1_ADDR_VERSION SHA1_ADDR_BASE + ADDR_VERSION
@@ -97,7 +99,7 @@
#define SHA1_BLOCK_LEN 512 / 8
#define SHA1_DIGEST_LEN 160 / 8
-#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1*HASH_CORE_SIZE)
+#define SHA256_ADDR_BASE SEGMENT_OFFSET_HASHES + (1 * HASH_CORE_SIZE)
#define SHA256_ADDR_NAME0 SHA256_ADDR_BASE + ADDR_NAME0
#define SHA256_ADDR_NAME1 SHA256_ADDR_BASE + ADDR_NAME1
#define SHA256_ADDR_VERSION SHA256_ADDR_BASE + ADDR_VERSION
@@ -108,14 +110,14 @@
#define SHA256_BLOCK_LEN 512 / 8
#define SHA256_DIGEST_LEN 256 / 8
-#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2*HASH_CORE_SIZE)
+#define SHA512_ADDR_BASE SEGMENT_OFFSET_HASHES + (2 * HASH_CORE_SIZE)
#define SHA512_ADDR_NAME0 SHA512_ADDR_BASE + ADDR_NAME0
#define SHA512_ADDR_NAME1 SHA512_ADDR_BASE + ADDR_NAME1
#define SHA512_ADDR_VERSION SHA512_ADDR_BASE + ADDR_VERSION
#define SHA512_ADDR_CTRL SHA512_ADDR_BASE + ADDR_CTRL
#define SHA512_ADDR_STATUS SHA512_ADDR_BASE + ADDR_STATUS
#define SHA512_ADDR_BLOCK SHA512_ADDR_BASE + ADDR_BLOCK
-#define SHA512_ADDR_DIGEST SHA512_ADDR_BASE + 0x100
+#define SHA512_ADDR_DIGEST SHA512_ADDR_BASE + (0x40 << 2)
#define SHA512_BLOCK_LEN 1024 / 8
#define SHA512_224_DIGEST_LEN 224 / 8
#define SHA512_256_DIGEST_LEN 256 / 8