diff options
author | Paul Selkirk <paul@psgd.org> | 2015-07-17 10:31:26 -0400 |
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committer | Paul Selkirk <paul@psgd.org> | 2015-07-17 10:31:26 -0400 |
commit | c44c8a77b56778c951fb09f94a577057573dbfa7 (patch) | |
tree | 5b9eea8bbdc21772e27844eb7b30549646da6e78 /eim/rtl | |
parent | 33cc55adaf9ff31473802414f9c0d6e4a553cddf (diff) |
experimental modexps6 (which requires changing the read timing on all other cores)
Diffstat (limited to 'eim/rtl')
-rw-r--r-- | eim/rtl/novena_eim.v | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/eim/rtl/novena_eim.v b/eim/rtl/novena_eim.v index 0d8c8d0..1a1b1f6 100644 --- a/eim/rtl/novena_eim.v +++ b/eim/rtl/novena_eim.v @@ -142,14 +142,8 @@ module novena_top // hashes, RNGs and ciphers to different regions (segments) of memory. //---------------------------------------------------------------- - // register read data for one clock cycle for EIM - wire [31 : 0] tmp_read_data; - reg [31 : 0] tmp_read_data_reg; - assign sys_eim_din = tmp_read_data_reg; - always @(posedge sys_clk) - begin - tmp_read_data_reg <= tmp_read_data; - end + wire [31 : 0] tmp_read_data; + assign sys_eim_din = tmp_read_data; core_selector cores ( |