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authorPaul Selkirk <paul@psgd.org>2015-11-13 17:03:52 -0500
committerPaul Selkirk <paul@psgd.org>2015-11-13 17:03:52 -0500
commitb1e661bf4f8a715743222977067c1cf560408b40 (patch)
treedbda524f94b591a9952577303f768f96f8d5ae88 /eim/rtl
parent5ad8554e49ed204ffe5242493b16d7735cadb4e6 (diff)
parent47508ec70ea2c85cb1541b1c3a214439357ad735 (diff)
Merge branch 'config_core_selector'
Diffstat (limited to 'eim/rtl')
-rw-r--r--eim/rtl/novena_eim.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/eim/rtl/novena_eim.v b/eim/rtl/novena_eim.v
index 23f08aa..8feec20 100644
--- a/eim/rtl/novena_eim.v
+++ b/eim/rtl/novena_eim.v
@@ -56,7 +56,7 @@ module novena_top
input wire eim_bclk, // EIM burst clock. Started by the CPU.
input wire eim_cs0_n, // Chip select (active low).
inout wire [15 : 0] eim_da, // Bidirectional address and data port.
- input wire [18: 16] eim_a, // MSB part of address port.
+ input wire [18: 16] eim_a, // MSB part of address port.
input wire eim_lba_n, // Latch address signal (active low).
input wire eim_wr_n, // write enable signal (active low).
input wire eim_oe_n, // output enable signal (active low).
@@ -163,7 +163,7 @@ module novena_top
.noise(ct_noise),
.debug(ct_led)
- );
+ );
//----------------------------------------------------------------