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authorRob Austein <sra@hactrn.net>2015-09-25 18:18:54 -0400
committerRob Austein <sra@hactrn.net>2015-09-25 18:18:54 -0400
commit9c67b22956ad8f49e71a4caef20eb246feb81ce1 (patch)
tree242943065dc4b7a85c7603a0d38ce678d1668383 /config
parent44626ff57b30a5db18766022430199c7eec8cbd6 (diff)
Incomplete attempt to track changes to core_selector architecture.
The board_regs and comm_regs cores handle reset differently, but there's also this sys_ena wire which appeared out of the ether one day and is not yet in this movie. This version does NOT synthesize (nor did the previous ones, but now we know it...).
Diffstat (limited to 'config')
-rwxr-xr-xconfig/config.py53
1 files changed, 48 insertions, 5 deletions
diff --git a/config/config.py b/config/config.py
index 6a5e532..65c540f 100755
--- a/config/config.py
+++ b/config/config.py
@@ -126,6 +126,16 @@ class SubCore(Core):
return createMux_template.format(core = self, core0 = self.parent)
+class BoardCore(Core):
+ """
+ Board-level cores have a slightly different API, which we handle
+ with a different template.
+ """
+
+ def createInstance(self):
+ return createInstance_template_board.format(core = self)
+
+
class TRNGCore(Core):
"""
The TRNG core has an internal mux and a collection of sub-cores.
@@ -153,11 +163,12 @@ class TRNGCore(Core):
def createMux(self):
return super(TRNGCore, self).createMux() + "".join(subcore.createMux() for subcore in self.subcores)
-# Hook TRNGCore in as the handler for "trng" core instances.
+# Hook special classes in as handlers for the cores that require them
-Core.special_class["trng"] = TRNGCore
-
-# Add other special cases here as needed.
+Core.special_class.update(
+ board_regs = BoardCore,
+ comm_regs = BoardCore,
+ trng = TRNGCore)
# Templates (format strings), here instead of inline in the functions
@@ -177,7 +188,7 @@ createInstance_template_generic = """\
//----------------------------------------------------------------
// {core.upper_instance_name}
//----------------------------------------------------------------
- wire enable_{core.instance_name} = (addr_core_num == CORE_ADDR_{core.upper_instance_name});
+ wire enable_{core.instance_name} = sys_ena && (addr_core_num == CORE_ADDR_{core.upper_instance_name});
wire [31: 0] read_data_{core.instance_name};
wire error_{core.instance_name};
@@ -197,9 +208,41 @@ createInstance_template_generic = """\
"""
+# Template used by BoardCore.createInstance(). This has minor
+# differences from the generic template, maybe we can merge them, or
+# maybe we can do something about the (gratuitous?) differences that
+# make this necessary.
+
+createInstance_template_board = """\
+ //----------------------------------------------------------------
+ // {core.upper_instance_name}
+ //----------------------------------------------------------------
+ wire enable_{core.instance_name} = sys_ena && (addr_core_num == CORE_ADDR_{core.upper_instance_name});
+ wire [31: 0] read_data_{core.instance_name};
+ wire error_{core.instance_name};
+
+ {core.name} {core.instance_name}_inst
+ (
+ .clk(sys_clk),
+ .rst(sys_rst),
+
+ .cs(enable_{core.instance_name} & (sys_eim_rd | sys_eim_wr)),
+ .we(sys_eim_wr),
+
+ .address(addr_core_reg),
+ .write_data(sys_write_data),
+ .read_data(read_data_{core.instance_name}),
+ .error(error_{core.instance_name})
+ );
+
+
+"""
+
# Template used by TRNGCore.createInstance(); this is different enough
# from the generic template that it's (probably) clearer to have this
# separate.
+#
+# Should this also be checking sys_ena? Not obvious to me either way.
createInstance_template_TRNG = """\
//----------------------------------------------------------------