diff options
| author | Rob Austein <sra@hactrn.net> | 2015-09-26 13:21:01 -0400 |
|---|---|---|
| committer | Rob Austein <sra@hactrn.net> | 2015-09-26 13:21:01 -0400 |
| commit | 19e4044fcf47360dcc5aa68f6eae5a62a6cdb61b (patch) | |
| tree | a73d95a6a02b3d9311abc7ffe6ad7d7fab42d17b /config/core_vfiles.mk | |
| parent | f43b493bcc7dfe1d6b49faad6dc32c8948573e29 (diff) | |
Sorted out reset pins (I think). Seems our various core authors have
different opinions about whether reset should be high or low, and the
core selector code is responsible for making this right. Hmm.
Address map may still be wrong, as addressing scheme seems to have
changed while the core_select branch was gathering dust.
Diffstat (limited to 'config/core_vfiles.mk')
| -rw-r--r-- | config/core_vfiles.mk | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/config/core_vfiles.mk b/config/core_vfiles.mk new file mode 100644 index 0000000..bd1c6d4 --- /dev/null +++ b/config/core_vfiles.mk @@ -0,0 +1,34 @@ +# NOTE: This file is generated; do not edit by hand. + +vfiles += \ + $(CORE_TREE)/hash/sha256/src/rtl/sha256.v \ + $(CORE_TREE)/hash/sha256/src/rtl/sha256_core.v \ + $(CORE_TREE)/hash/sha256/src/rtl/sha256_k_constants.v \ + $(CORE_TREE)/hash/sha256/src/rtl/sha256_w_mem.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_core.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_decipher_block.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_encipher_block.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_inv_sbox.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_key_mem.v \ + $(CORE_TREE)/cipher/aes/src/rtl/aes_sbox.v \ + $(CORE_TREE)/rng/avalanche_entropy/src/rtl/avalanche_entropy.v \ + $(CORE_TREE)/rng/avalanche_entropy/src/rtl/avalanche_entropy_core.v \ + $(CORE_TREE)/rng/rosc_entropy/src/rtl/rosc.v \ + $(CORE_TREE)/rng/rosc_entropy/src/rtl/rosc_entropy.v \ + $(CORE_TREE)/rng/rosc_entropy/src/rtl/rosc_entropy_core.v \ + $(CORE_TREE)/rng/trng/src/rtl/trng.v \ + $(CORE_TREE)/rng/trng/src/rtl/trng_csprng.v \ + $(CORE_TREE)/rng/trng/src/rtl/trng_csprng_fifo.v \ + $(CORE_TREE)/rng/trng/src/rtl/trng_mixer.v \ + $(CORE_TREE)/math/modexp/src/rtl/adder.v \ + $(CORE_TREE)/math/modexp/src/rtl/blockmem1r1w.v \ + $(CORE_TREE)/math/modexp/src/rtl/blockmem2r1wptr.v \ + $(CORE_TREE)/math/modexp/src/rtl/blockmem2r1w.v \ + $(CORE_TREE)/math/modexp/src/rtl/blockmem2rptr1w.v \ + $(CORE_TREE)/math/modexp/src/rtl/modexp.v \ + $(CORE_TREE)/math/modexp/src/rtl/modexp_core.v \ + $(CORE_TREE)/math/modexp/src/rtl/montprod.v \ + $(CORE_TREE)/math/modexp/src/rtl/residue.v \ + $(CORE_TREE)/math/modexp/src/rtl/shl.v \ + $(CORE_TREE)/math/modexp/src/rtl/shr.v |