From 584e2974cf87b8f1b9279c0b4faa1f22b1ff54c4 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Fri, 20 Jan 2017 18:08:28 -0500 Subject: Add ecdsa256 core. --- config/core.cfg | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/config/core.cfg b/config/core.cfg index 62fb93a..e9ed10a 100644 --- a/config/core.cfg +++ b/config/core.cfg @@ -90,6 +90,10 @@ cores = sha1 sha256 sha512 aes trng modexp mkmif # super-size it cores = mkmif trng sha1 sha1 sha1 sha256 sha256 sha256 sha512 sha512 sha512 aes aes aes modexp modexp modexp +[project hsm-ecdsa256] +# make me one with everything including experimental ecdsa256 core +cores = sha1 sha256 sha512 aes trng modexp mkmif ecdsa256 + # [core] sections # # vfiles: A list of Verilog files to include in the vfiles list when @@ -255,3 +259,55 @@ dummy = assign mkm_sclk = 0; assign mkm_cs_n = 0; assign mkm_di = 0; + +[core ecdsa256] +# ECDSA-P256 point multipler +# I *think* this all fits in one 256-register core block (see address map in ecdsa256/README.md) +# but I may be reading this cross-eyed so come back to this if the resulting bitstream acts weird. +block memory = yes +error wire = no +module name = ecdsa256_wrapper +vfiles = + ../user/shatov/ecdsa256/rtl/curve/uop_ecdsa.v + ../user/shatov/ecdsa256/rtl/curve/curve_dbl_add_256.v + ../user/shatov/ecdsa256/rtl/curve/curve_mul_256.v + ../user/shatov/ecdsa256/rtl/curve/uop/uop_dbl_rom.v + ../user/shatov/ecdsa256/rtl/curve/uop/uop_init_rom.v + ../user/shatov/ecdsa256/rtl/curve/uop/uop_add_rom.v + ../user/shatov/ecdsa256/rtl/curve/uop/uop_conv_rom.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_delta.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_one.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_h_y.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_zero.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_q.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_g_y.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_h_x.v + ../user/shatov/ecdsa256/rtl/curve/rom/brom_p256_g_x.v + ../user/shatov/ecdsa256/rtl/lowlevel/subtractor32_wrapper.v + ../user/shatov/ecdsa256/rtl/lowlevel/ecdsa_lowlevel_settings.v + ../user/shatov/ecdsa256/rtl/lowlevel/mac16_wrapper.v + ../user/shatov/ecdsa256/rtl/lowlevel/artix7/adder32_artix7.v + ../user/shatov/ecdsa256/rtl/lowlevel/artix7/adder47_artix7.v + ../user/shatov/ecdsa256/rtl/lowlevel/artix7/mac16_artix7.v + ../user/shatov/ecdsa256/rtl/lowlevel/artix7/subtractor32_artix7.v + ../user/shatov/ecdsa256/rtl/lowlevel/artix7/dsp48e1_wrapper.v + ../user/shatov/ecdsa256/rtl/lowlevel/adder32_wrapper.v + ../user/shatov/ecdsa256/rtl/lowlevel/adder47_wrapper.v + ../user/shatov/ecdsa256/rtl/ecdsa256.v + ../user/shatov/ecdsa256/rtl/modular/modular_multiplier_256.v + ../user/shatov/ecdsa256/rtl/modular/modular_adder.v + ../user/shatov/ecdsa256/rtl/modular/modular_subtractor.v + ../user/shatov/ecdsa256/rtl/modular/modular_reductor_256.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/modular_invertor.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_copy.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_init.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v + ../user/shatov/ecdsa256/rtl/modular/modular_invertor/modinv_clog2.v + ../user/shatov/ecdsa256/rtl/util/bram_1rw_1ro_readfirst.v + ../user/shatov/ecdsa256/rtl/multiword/mw_mover.v + ../user/shatov/ecdsa256/rtl/multiword/mw_comparator.v + ../user/shatov/ecdsa256/rtl/ecdsa256_wrapper.v -- cgit v1.2.3