From 8cd28d0fc12f0671ae3af89209de52a159d8cf19 Mon Sep 17 00:00:00 2001
From: "Pavel V. Shatov (Meister)" <meisterpaul1@yandex.ru>
Date: Wed, 19 Dec 2018 15:47:33 +0300
Subject: Added `include directories to Makefile

---
 build/Makefile | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'build/Makefile')

diff --git a/build/Makefile b/build/Makefile
index f573ace..5a6107d 100644
--- a/build/Makefile
+++ b/build/Makefile
@@ -16,7 +16,11 @@ part		= xc7a200tfbg484-1
 top_module	= alpha_fmc_top
 isedir		= /opt/Xilinx/14.7/ISE_DS
 xil_env		= . $(isedir)/settings$(WORD_SIZE).sh
-ucf		?= ../ucf/$(project).ucf
+ucf			?= ../ucf/$(project).ucf
+
+# verilog include directories {yes, XST wants them exactly this way in curly braces}
+vlgincdir	= {$(CORE_TREE)/lib/lowlevel $(CORE_TREE)/math/ecdsalib/rtl/microcode}
+
 
 all:	$(project).bit
 
-- 
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