From 97aaac4da6e33e218b26c1963ab563e9e2c11e82 Mon Sep 17 00:00:00 2001
From: Paul Selkirk <paul@psgd.org>
Date: Mon, 27 Aug 2018 16:59:34 -0400
Subject: correct fpga part number, add keywrap build target

---
 build/Makefile | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/build/Makefile b/build/Makefile
index ca5d735..22fd1f4 100644
--- a/build/Makefile
+++ b/build/Makefile
@@ -40,6 +40,10 @@ bare trng hash mkmif rsa hsm hsm-super:
 	$(CONFIG_GEN) -p $@
 	$(MAKE) project=$(project)_$@ ucf=$(ucf)
 
+keywrap:
+	$(CONFIG_GEN) -p keywrap
+	$(MAKE) project=$(project)_keywrap ucf=$(ucf)
+
 # Verilog files that always go with builds on this platform.
 
 vfiles = \
-- 
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