diff options
Diffstat (limited to 'rtl/alpha_fmc_top.v')
| -rw-r--r-- | rtl/alpha_fmc_top.v | 64 |
1 files changed, 28 insertions, 36 deletions
diff --git a/rtl/alpha_fmc_top.v b/rtl/alpha_fmc_top.v index 03c2802..a07beee 100644 --- a/rtl/alpha_fmc_top.v +++ b/rtl/alpha_fmc_top.v @@ -8,7 +8,7 @@ // // // Author: Pavel Shatov -// Copyright (c) 2016, NORDUnet A/S All rights reserved. +// Copyright (c) 2016, 2018 NORDUnet A/S All rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions @@ -67,46 +67,25 @@ module alpha_fmc_top //---------------------------------------------------------------- // Clock Manager // - // Clock manager is used to generate SYS_CLK from GCLK - // and implement the reset logic. + // Clock manager is used to buffer FMC_CLK and implement reset logic. // ---------------------------------------------------------------- - wire sys_clk; - wire sys_rst_n; + wire sys_clk; // system clock (90 MHz) + wire sys_rst_n; // active-low reset - alpha_clkmgr # - ( - .CLK_OUT_MUL (20.0), // 2..64 - .CLK_OUT_DIV (20.0) // 1..128 - ) - clkmgr - ( - .gclk (gclk_pin), - - .sys_clk (sys_clk), - .sys_rst_n (sys_rst_n) - ); - - - //---------------------------------------------------------------- - // BUFG - // - // FMC clock must be routed through the global clocking backbone. - // ---------------------------------------------------------------- - wire fmc_clk_bug; - - BUFG BUFG_fmc_clk - ( - .I (fmc_clk), - .O (fmc_clk_bufg) - ); + alpha_clkmgr clkmgr + ( + .fmc_clk (fmc_clk), + + .sys_clk (sys_clk), + .sys_rst_n (sys_rst_n) + ); //---------------------------------------------------------------- // FMC Arbiter // - // FMC arbiter handles FMC access and transfers it into - // `sys_clk' clock domain. + // FMC arbiter handles FMC accesses. //---------------------------------------------------------------- wire [23: 0] sys_fmc_addr; // address @@ -121,7 +100,6 @@ module alpha_fmc_top ) fmc ( - .fmc_clk(fmc_clk_bufg), .fmc_a(fmc_a), .fmc_d(fmc_d), .fmc_ne1(fmc_ne1), @@ -162,6 +140,20 @@ module alpha_fmc_top // hashes, RNGs and ciphers to different regions (segments) of memory. //---------------------------------------------------------------- + // A note on byte-swapping: + // STM32 is little-endian, while the register interface here is + // big-endian. The software reads and writes 32-bit integer values, + // which means transmitting the least significant byte first. Up to + // now, we've been doing byte-swapping in software, which is + // inefficient, especially for bulk data transfer. So now we're doing + // the byte-swapping in hardware. + + wire [31:0] write_data; + assign write_data = {sys_fmc_dout[7:0], sys_fmc_dout[15:8], sys_fmc_dout[23:16], sys_fmc_dout[31:24]}; + + wire [31 : 0] read_data; + assign sys_fmc_din = {read_data[7:0], read_data[15:8], read_data[23:16], read_data[31:24]}; + core_selector cores ( .sys_clk(sys_clk), @@ -170,8 +162,8 @@ module alpha_fmc_top .sys_fmc_addr(sys_fmc_addr), .sys_fmc_wr(sys_fmc_wren), .sys_fmc_rd(sys_fmc_rden), - .sys_write_data(sys_fmc_dout), - .sys_read_data(sys_fmc_din), + .sys_write_data(write_data), + .sys_read_data(read_data), .noise(ct_noise), |