diff options
Diffstat (limited to 'build')
| -rw-r--r-- | build/Makefile | 10 | ||||
| -rw-r--r-- | build/xilinx.opt | 4 |
2 files changed, 10 insertions, 4 deletions
diff --git a/build/Makefile b/build/Makefile index 2fc9fe0..789ab87 100644 --- a/build/Makefile +++ b/build/Makefile @@ -20,7 +20,10 @@ ucf ?= ../ucf/$(project).ucf # Verilog include directories, if needed -vlgincdir = $(CORE_TREE)/lib/lowlevel $(CORE_TREE)/math/ecdsalib/rtl/microcode +vlgincdir = \ + $(CORE_TREE)/lib/lowlevel \ + $(CORE_TREE)/math/ecdsalib/rtl/microcode \ + $(CORE_TREE)/lib/util all: $(project).bit @@ -36,7 +39,7 @@ core_selector.v core_vfiles.mk: # Build some different configurations -bare trng hash mkmif rsa hsm hsm-super keywrap: +bare trng hash mkmif rsa hsm hsm-super hsm_ng hsm_ng_keywrap: $(CONFIG_GEN) -p $@ $(MAKE) project=$(project)_$@ ucf=$(ucf) @@ -47,7 +50,10 @@ vfiles = \ $(CORE_TREE)/platform/alpha/rtl/alpha_regs.v \ $(CORE_TREE)/platform/alpha/rtl/alpha_clkmgr.v \ $(CORE_TREE)/platform/alpha/rtl/clkmgr_mmcm.v \ + $(CORE_TREE)/platform/alpha/rtl/clkmgr_mmcm_ctrl.v \ ./core_selector.v \ + $(CORE_TREE)/platform/alpha/rtl/clkmgr_reset_gen.v \ + $(CORE_TREE)/platform/common/extra/reset_replicator.v \ $(CORE_TREE)/comm/fmc/src/rtl/fmc_arbiter.v \ $(CORE_TREE)/comm/fmc/src/rtl/fmc_d_phy.v \ $(CORE_TREE)/comm/fmc/src/rtl/fmc_indicator.v \ diff --git a/build/xilinx.opt b/build/xilinx.opt index 1ac8957..536725d 100644 --- a/build/xilinx.opt +++ b/build/xilinx.opt @@ -28,7 +28,7 @@ -shreg_extract YES -shreg_min_size 2 -auto_bram_packing NO --resource_sharing YES +-resource_sharing NO -async_to_sync NO -use_dsp48 auto -iobuf YES @@ -43,5 +43,5 @@ -use_sync_set Auto -use_sync_reset Auto -iob auto --equivalent_register_removal YES +-equivalent_register_removal NO -slice_utilization_ratio_maxmargin 5 |