diff options
Diffstat (limited to 'build/Makefile')
| -rw-r--r-- | build/Makefile | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/build/Makefile b/build/Makefile index 5a6107d..60e55f9 100644 --- a/build/Makefile +++ b/build/Makefile @@ -16,11 +16,11 @@ part = xc7a200tfbg484-1 top_module = alpha_fmc_top isedir = /opt/Xilinx/14.7/ISE_DS xil_env = . $(isedir)/settings$(WORD_SIZE).sh -ucf ?= ../ucf/$(project).ucf +ucf ?= ../ucf/$(project).ucf -# verilog include directories {yes, XST wants them exactly this way in curly braces} -vlgincdir = {$(CORE_TREE)/lib/lowlevel $(CORE_TREE)/math/ecdsalib/rtl/microcode} +# Verilog include directories, if needed +vlgincdir = $(CORE_TREE)/lib/lowlevel $(CORE_TREE)/math/ecdsalib/rtl/microcode all: $(project).bit |